From 84f63f6996db657fe1291b4cc6e08b66422918c4 Mon Sep 17 00:00:00 2001
From: Wilson Fung <wlfung@gmail.com>
Date: Thu, 25 Jul 2013 14:06:34 -0800
Subject: Adding bandwidth modeling to the cache model.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671]
---
 src/gpgpu-sim/stats.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/gpgpu-sim/stats.h')

diff --git a/src/gpgpu-sim/stats.h b/src/gpgpu-sim/stats.h
index c1b3f2a..6a50f05 100644
--- a/src/gpgpu-sim/stats.h
+++ b/src/gpgpu-sim/stats.h
@@ -50,6 +50,7 @@ enum mem_stage_stall_type {
    ICNT_RC_FAIL,
    COAL_STALL,
    TLB_STALL,
+   DATA_PORT_STALL,
    WB_ICNT_RC_FAIL,
    WB_CACHE_RSRV_FAIL,
    N_MEM_STAGE_STALL_TYPE
-- 
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