From b3ce70a797756285ea9b15b3e5cf515d8b6a2b63 Mon Sep 17 00:00:00 2001
From: Tor Aamodt <aamodt@ece.ubc.ca>
Date: Sun, 10 Oct 2010 21:19:52 -0800
Subject: 1. create function unit classes for SP, SFU, LD/ST. 2. refactor
 memory stage into a ld/st function unit 3. refactor memory access generation
 (moved into warp_inst_t class)

the above should make supporting fermi uarch much easier

passing CUDA 3.1 regression

still need to...
(a) update scoreboard to keep count of outstanding memory requests
    and use operand collector for writebacks into register file
(b) add back shared memory pipeline delay
(c) remove use of MSHR's for non-cached global/local accesses
(d) replace texture cache with a split tag/data array pipe
(e) re-implement memory_partition stuff so it makes more sense

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7844]
---
 src/gpgpu-sim/visualizer.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/gpgpu-sim/visualizer.cc')

diff --git a/src/gpgpu-sim/visualizer.cc b/src/gpgpu-sim/visualizer.cc
index fd0a422..4474dcd 100644
--- a/src/gpgpu-sim/visualizer.cc
+++ b/src/gpgpu-sim/visualizer.cc
@@ -142,6 +142,7 @@ void gpgpu_sim::visualizer_printstat()
    shader_CTA_count_visualizer_gzprint(visualizer_file);
 
    // per shader core cache miss rate 
+/*
    gzprintf(visualizer_file, "CacheMissRate_GlobalLocalL1_All: ");
    for (unsigned i=0;i<m_n_shader;i++) 
       gzprintf(visualizer_file, "%0.4f ", m_sc[i]->L1_windowed_cache_miss_rate(0));
@@ -166,10 +167,10 @@ void gpgpu_sim::visualizer_printstat()
    for (unsigned i=0;i<m_n_shader;i++) 
       gzprintf(visualizer_file, "%0.4f ", m_sc[i]->L1const_windowed_cache_miss_rate(1));
    gzprintf(visualizer_file, "\n");
-
    // reset for next interval
    for (unsigned i=0;i<m_n_shader;i++) 
       m_sc[i]->new_cache_window();
+*/
 
    for (unsigned i=0;i<m_n_mem;i++) 
       m_memory_partition_unit[i]->visualizer_print(visualizer_file);
-- 
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