From 7e23577fe997273766523afcd49c36d0f8dcd85d Mon Sep 17 00:00:00 2001 From: "Andrew M. B. Boktor" Date: Fri, 4 May 2012 18:42:17 -0800 Subject: Adding configurable instruction latencies and initiation intervals The observed latencies are reduced by 5 to account for other stages in the SM pipeline Eventually this should be calibrated against the microbenchmarks [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12310] --- src/gpgpu-sim/shader.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gpgpu-sim') diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 5d6aa86..571a4b9 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -956,7 +956,7 @@ struct shader_core_config : public core_config } max_warps_per_shader = n_thread_per_shader/warp_size; assert( !(n_thread_per_shader % warp_size) ); - max_sfu_latency = 32; + max_sfu_latency = 512; max_sp_latency = 32; m_L1I_config.init(); m_L1T_config.init(); @@ -1275,7 +1275,7 @@ private: std::vector m_issue_port; std::vector m_fu; // stallable pipelines should be last in this array ldst_unit *m_ldst_unit; - static const unsigned MAX_ALU_LATENCY = 64; + static const unsigned MAX_ALU_LATENCY = 512; std::bitset m_result_bus; // used for local address mapping with single kernel launch -- cgit v1.3