From 8c2954c263b4cfd756188362919c1a16a7189788 Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Fri, 8 Oct 2010 07:21:51 -0800 Subject: 1. refactoring cuda api code for loading PTX (removing external PTX loading entirely) 2. some bug fixes for warp_inst_t 3. creating a new class, gpgpu_t, which contains the functional "memory" state visible to all threads running on a GPU (doing this as part of my continuing effort to hunt down and eradicate every global variable that is not the top level "the gpu") 4. other misc. changes Almost passing CUDA 3.1 regression? oclHistogram keeps failing under torque, but does not fail when run on the command line from the same directory. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7827] --- src/gpgpu-sim/gpu-sim.cc | 12 ++++-------- src/gpgpu-sim/gpu-sim.h | 9 ++++++++- src/gpgpu-sim/shader.cc | 31 +++++++++++++++++++++---------- src/gpgpu-sim/shader.h | 30 +++++++++++++++++------------- 4 files changed, 50 insertions(+), 32 deletions(-) (limited to 'src/gpgpu-sim') diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 96d5c62..77c6aae 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -174,10 +174,6 @@ int g_ptx_inst_debug_to_file; char* g_ptx_inst_debug_file; int g_ptx_inst_debug_thread_uid; -int g_ptx_convert_to_ptxplus; -int g_ptx_save_converted_ptxplus; -unsigned g_ptx_force_max_capability; - void visualizer_options(option_parser_t opp); void gpgpu_sim::reg_options(option_parser_t opp) @@ -371,15 +367,15 @@ void gpgpu_sim::reg_options(option_parser_t opp) "Thread UID for executed instructions' debug output", "1"); option_parser_register(opp, "-gpgpu_ptx_convert_to_ptxplus", OPT_BOOL, - &g_ptx_convert_to_ptxplus, + &m_ptx_convert_to_ptxplus, "Convert embedded ptx to ptxplus", "0"); option_parser_register(opp, "-gpgpu_ptx_save_converted_ptxplus", OPT_BOOL, - &g_ptx_save_converted_ptxplus, + &m_ptx_save_converted_ptxplus, "Saved converted ptxplus to a file", "0"); option_parser_register(opp, "-gpgpu_ptx_force_max_capability", OPT_UINT32, - &g_ptx_force_max_capability, + &m_ptx_force_max_capability, "Force maximum compute capability", "0"); option_parser_register(opp, "-gpgpu_operand_collector", OPT_BOOL, &m_shader_config->gpgpu_operand_collector, @@ -1080,7 +1076,7 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel ) for (unsigned i = start_thread; iwarp_size; - nthreads_in_block += ptx_sim_init_thread(kernel,&m_thread[i].m_functional_model_thread_state,m_sid,i,cta_size-(i-start_thread),m_config->n_thread_per_shader,this,free_cta_hw_id,warp_id); + nthreads_in_block += ptx_sim_init_thread(kernel,&m_thread[i].m_functional_model_thread_state,m_sid,i,cta_size-(i-start_thread),m_config->n_thread_per_shader,this,free_cta_hw_id,warp_id,m_gpu); warps.set( warp_id ); } assert( nthreads_in_block > 0 && nthreads_in_block <= m_config->n_thread_per_shader); // should be at least one, but less than max diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index ac03cbc..d690fab 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -178,7 +178,7 @@ extern int g_ptx_inst_debug_thread_uid; -class gpgpu_sim { +class gpgpu_sim : public gpgpu_t { public: gpgpu_sim(); @@ -211,6 +211,10 @@ public: void gpu_print_stat() const; void dump_pipeline( int mask, int s, int m ) const; + unsigned get_forced_capability() const { return m_ptx_force_max_capability; } + bool convert_to_ptxplus() const { return m_ptx_convert_to_ptxplus; } + bool saved_converted_ptxplus() const { return m_ptx_save_converted_ptxplus; } + private: // clocks void init_clock_domains(void); @@ -271,6 +275,9 @@ private: // options bool gpu_deadlock_detect; + int m_ptx_convert_to_ptxplus; + int m_ptx_save_converted_ptxplus; + unsigned m_ptx_force_max_capability; // stats struct shader_core_stats *m_shader_stats; diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 061952a..54e4ffa 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -593,7 +593,7 @@ void pdom_warp_ctx_t::print (FILE *fout) const } for (unsigned m=1,j=0; jm_active_mask[k] & m)?'1':'0') ); - fprintf(fout, " pc: %4u", warp->m_pc[k] ); + fprintf(fout, " pc: 0x%03x", warp->m_pc[k] ); if ( warp->m_recvg_pc[k] == (unsigned)-1 ) { fprintf(fout," rp: ---- cd: %2u ", warp->m_calldepth[k] ); } else { @@ -639,13 +639,14 @@ void shader_core_ctx::fetch_new() // decode 1 or 2 instructions and place them into ibuffer address_type pc = m_inst_fetch_buffer.m_pc; const warp_inst_t* pI1 = ptx_fetch_inst(pc); - assert(pI1); m_warp[m_inst_fetch_buffer.m_warp_id].ibuffer_fill(0,pI1); m_warp[m_inst_fetch_buffer.m_warp_id].inc_inst_in_pipeline(); - const warp_inst_t* pI2 = ptx_fetch_inst(pc+pI1->isize); - if( pI2 ) { - m_warp[m_inst_fetch_buffer.m_warp_id].ibuffer_fill(1,pI2); - m_warp[m_inst_fetch_buffer.m_warp_id].inc_inst_in_pipeline(); + if( pI1 ) { + const warp_inst_t* pI2 = ptx_fetch_inst(pc+pI1->isize); + if( pI2 ) { + m_warp[m_inst_fetch_buffer.m_warp_id].ibuffer_fill(1,pI2); + m_warp[m_inst_fetch_buffer.m_warp_id].inc_inst_in_pipeline(); + } } m_inst_fetch_buffer.m_valid = false; } @@ -767,10 +768,12 @@ void shader_core_ctx::decode_new() unsigned issued=0; while( !m_warp[warp_id].waiting() && !m_warp[warp_id].ibuffer_empty() && (checked < 2) && (issued < 2) ) { unsigned active_mask = m_pdom_warp[warp_id]->get_active_mask(); - const warp_inst_t *pI = m_warp[warp_id].ibuffer_next(); + const warp_inst_t *pI = m_warp[warp_id].ibuffer_next_inst(); + bool valid = m_warp[warp_id].ibuffer_next_valid(); unsigned pc,rpc; m_pdom_warp[warp_id]->get_pdom_stack_top_info(&pc,&rpc); if( pI ) { + assert(valid); if( pc != pI->pc ) { // control hazard m_warp[warp_id].set_next_pc(pc); @@ -785,6 +788,10 @@ void shader_core_ctx::decode_new() issued++; } } + } else if( valid ) { + // this case can happen after a return instruction in diverged warp + m_warp[warp_id].set_next_pc(pc); + m_warp[warp_id].ibuffer_flush(); } m_warp[warp_id].ibuffer_step(); checked++; @@ -792,7 +799,7 @@ void shader_core_ctx::decode_new() if ( issued ) { m_last_warp_issued=warp_id; break; - } + } } } @@ -852,7 +859,9 @@ mshr_entry* mshr_shader_unit::add_mshr(mem_access_t &access, warp_inst_t* warp) // creates an mshr based on the access struct information mshr_entry* mshr = alloc_free_mshr(access.space == tex_space); mshr->init(access.addr,access.iswrite,access.space,warp->warp_id()); - mshr->add_inst(*warp); + warp_inst_t inst = *warp; + inst.set_active(access.warp_indices); + mshr->add_inst(inst); if( m_shader_config->gpgpu_interwarp_mshr_merge ) { mshr_entry* mergehit = m_mshr_lookup.shader_get_mergeable_mshr(mshr); if (mergehit) { @@ -2025,8 +2034,10 @@ void shd_warp_t::print_ibuffer( FILE *fout ) const { fprintf(fout," ibuffer[%2u] : ", m_warp_id ); for( unsigned i=0; i < IBUFFER_SIZE; i++) { - const inst_t *inst = m_ibuffer[i]; + const inst_t *inst = m_ibuffer[i].m_inst; if( inst ) inst->print_insn(fout); + else if( m_ibuffer[i].m_valid ) + fprintf(fout," "); else fprintf(fout," "); } fprintf(fout,"\n"); diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index d9a8825..cdbaf37 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -146,8 +146,6 @@ public: m_done_exit=false; m_last_fetch=0; m_next=0; - for(unsigned i=0;i