From db789973ec11440d4b4d02bc9ad1481ec9b1054f Mon Sep 17 00:00:00 2001 From: leonyu Date: Mon, 21 Oct 2013 21:08:33 -0800 Subject: warning fixes 2nd patch, including comments removal and strict aliasing fixes. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183] --- src/gpuwattch/cacti/Ucache.cc | 6 ----- src/gpuwattch/cacti/basic_circuit.cc | 43 ++------------------------------ src/gpuwattch/cacti/mat.cc | 48 ++---------------------------------- src/gpuwattch/cacti/nuca.cc | 10 +++----- src/gpuwattch/cacti/technology.cc | 30 ++-------------------- src/gpuwattch/cacti/uca.cc | 7 ------ 6 files changed, 9 insertions(+), 135 deletions(-) (limited to 'src/gpuwattch/cacti') diff --git a/src/gpuwattch/cacti/Ucache.cc b/src/gpuwattch/cacti/Ucache.cc index 6f37f1a..e855238 100644 --- a/src/gpuwattch/cacti/Ucache.cc +++ b/src/gpuwattch/cacti/Ucache.cc @@ -683,7 +683,6 @@ void filter_data_arr(list & curr_list) */ void solve(uca_org_t *fin_res) { - bool is_dram = false; int pure_ram = g_ip->pure_ram; bool pure_cam = g_ip->pure_cam; @@ -718,14 +717,11 @@ void solve(uca_org_t *fin_res) } bool is_tag; - uint32_t ram_cell_tech_type; // If it's a cache, first calculate the area, delay and power for all tag array partitions. if (!(pure_ram||pure_cam||g_ip->fully_assoc)) { //cache is_tag = true; - ram_cell_tech_type = g_ip->tag_arr_ram_cell_tech_type; - is_dram = ((ram_cell_tech_type == lp_dram) || (ram_cell_tech_type == comm_dram)); init_tech_params(g_ip->F_sz_um, is_tag); for (uint32_t t = 0; t < nthreads; t++) @@ -755,8 +751,6 @@ void solve(uca_org_t *fin_res) // if (!g_ip->fully_assoc) // {//in the new cacti, cam, fully_associative cache are processed as single array in the data portion is_tag = false; - ram_cell_tech_type = g_ip->data_arr_ram_cell_tech_type; - is_dram = ((ram_cell_tech_type == lp_dram) || (ram_cell_tech_type == comm_dram)); init_tech_params(g_ip->F_sz_um, is_tag); for (uint32_t t = 0; t < nthreads; t++) diff --git a/src/gpuwattch/cacti/basic_circuit.cc b/src/gpuwattch/cacti/basic_circuit.cc index 9aeb4e7..a8ea501 100644 --- a/src/gpuwattch/cacti/basic_circuit.cc +++ b/src/gpuwattch/cacti/basic_circuit.cc @@ -736,7 +736,7 @@ double shortcircuit_simple( double vdd) { - double p_short_circuit, p_short_circuit_discharge, p_short_circuit_charge, p_short_circuit_discharge_low, p_short_circuit_discharge_high, p_short_circuit_charge_low, p_short_circuit_charge_high; //this is actually energy + double p_short_circuit, p_short_circuit_discharge, p_short_circuit_charge, p_short_circuit_discharge_low, p_short_circuit_charge_low;//this is actually energy double fo_n, fo_p, fanout, beta_ratio, vt_to_vdd_ratio; fo_n = i_on_n/i_on_n_in; @@ -755,8 +755,6 @@ double shortcircuit_simple( // t4=t1/t2/t3; // cout <area.get_area() + sa_mux_lev_2_dec->area.get_area()) * (RWP + ERP + EWP); - double area_efficiency_mat; // if (!is_fa) // { @@ -400,7 +399,6 @@ Mat::Mat(const DynamicParameter & dyn_p) area.h = (num_subarrays_per_mat/num_subarrays_per_row)* subarray.area.h + h_non_cell_area; area.w = num_subarrays_per_row * subarray.area.get_w() + w_non_cell_area; area.w = (area.h*area.w + area_mat_center_circuitry) / area.h; - area_efficiency_mat = subarray.area.get_area() * num_subarrays_per_mat * 100.0 / area.get_area(); // cout<<"h_bit_mux_sense_amp_precharge_sa_mux_write_driver_write_mux"<F_sz_um;//this was 360 micron for the 0.8 micron process - Wdecdriven = 300 * g_ip->F_sz_um;//this was 240 micron for the 0.8 micron process - Wfadriven = 62.5 * g_ip->F_sz_um;//this was 50 micron for the 0.8 micron process - Wfadrivep = 125 * g_ip->F_sz_um;//this was 100 micron for the 0.8 micron process - Wfadrive2n = 250 * g_ip->F_sz_um;//this was 200 micron for the 0.8 micron process - Wfadrive2p = 500 * g_ip->F_sz_um;//this was 400 micron for the 0.8 micron process - Wfadecdrive1n = 6.25 * g_ip->F_sz_um;//this was 5 micron for the 0.8 micron process - Wfadecdrive1p = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wfadecdrive2n = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfadecdrive2p = 50 * g_ip->F_sz_um;//this was 40 micron for the 0.8 micron process - Wfadecdriven = 62.5 * g_ip->F_sz_um;//this was 50 micron for the 0.8 micron process - Wfadecdrivep = 125 * g_ip->F_sz_um;//this was 100 micron for the 0.8 micron process - Wfaprechn = 7.5 * g_ip->F_sz_um;//this was 6 micron for the 0.8 micron process - Wfainvn = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wfainvp = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfanandn = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfanandp = 37.5 * g_ip->F_sz_um;//this was 30 micron for the 0.8 micron process - Wdecnandn = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wdecnandp = 37.5 * g_ip->F_sz_um;//this was 30 micron for the 0.8 micron process Wfaprechp = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process Wdummyn = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process @@ -730,26 +706,6 @@ double Mat::compute_cam_delay(double inrisetime) } else { - Wdecdrivep = 450 * g_ip->F_sz_um;//this was 360 micron for the 0.8 micron process - Wdecdriven = 300 * g_ip->F_sz_um;//this was 240 micron for the 0.8 micron process - Wfadriven = 62.5 * g_ip->F_sz_um;//this was 50 micron for the 0.8 micron process - Wfadrivep = 125 * g_ip->F_sz_um;//this was 100 micron for the 0.8 micron process - Wfadrive2n = 250 * g_ip->F_sz_um;//this was 200 micron for the 0.8 micron process - Wfadrive2p = 500 * g_ip->F_sz_um;//this was 400 micron for the 0.8 micron process - Wfadecdrive1n = 6.25 * g_ip->F_sz_um;//this was 5 micron for the 0.8 micron process - Wfadecdrive1p = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wfadecdrive2n = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfadecdrive2p = 50 * g_ip->F_sz_um;//this was 40 micron for the 0.8 micron process - Wfadecdriven = 62.5 * g_ip->F_sz_um;//this was 50 micron for the 0.8 micron process - Wfadecdrivep = 125 * g_ip->F_sz_um;//this was 100 micron for the 0.8 micron process - Wfaprechn = 7.5 * g_ip->F_sz_um;//this was 6 micron for the 0.8 micron process - Wfainvn = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wfainvp = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfanandn = 25 * g_ip->F_sz_um;//this was 20 micron for the 0.8 micron process - Wfanandp = 37.5 * g_ip->F_sz_um;//this was 30 micron for the 0.8 micron process - Wdecnandn = 12.5 * g_ip->F_sz_um;//this was 10 micron for the 0.8 micron process - Wdecnandp = 37.5 * g_ip->F_sz_um;//this was 30 micron for the 0.8 micron process - Wfaprechp = g_tp.w_pmos_bl_precharge;//this was 10 micron for the 0.8 micron process Wdummyn = g_tp.cam.cell_nmos_w; Wdummyinvn = 75 * g_ip->F_sz_um;//this was 60 micron for the 0.8 micron process diff --git a/src/gpuwattch/cacti/nuca.cc b/src/gpuwattch/cacti/nuca.cc index d963090..9518791 100644 --- a/src/gpuwattch/cacti/nuca.cc +++ b/src/gpuwattch/cacti/nuca.cc @@ -142,7 +142,7 @@ Nuca::sim_nuca() /* temp variables */ int it, ro, wr; int num_cyc; - unsigned int i, j, k; + unsigned int i, j; unsigned int r, c; int l2_c; int bank_count = 0; @@ -166,10 +166,9 @@ Nuca::sim_nuca() double avg_lat, avg_hop, avg_hhop, avg_vhop, avg_dyn_power, avg_leakage_power; - double opt_acclat = INF, opt_avg_lat = INF, opt_tot_lat = INF; + double opt_acclat = INF; int opt_rows = 0; int opt_columns = 0; - double opt_totno_hops = 0; double opt_avg_hop = 0; double opt_dyn_power = 0, opt_leakage_power = 0; min_values_t minval; @@ -285,7 +284,7 @@ Nuca::sim_nuca() * count value. */ totno_hops = totno_hhops = totno_vhops = tot_lat = 0; - k = 1; + for (i=0; iDynamic Tab I_on_n[2] = 916.1e-6;//A/micron - I_on_p[2] = I_on_n[2] / 2; nmos_effective_resistance_multiplier = 1.73; n_to_p_eff_curr_drv_ratio[2] = 2; gmp_to_gmn_multiplier[2] = 1.11; @@ -1524,7 +1501,6 @@ void init_tech_params(double technology, bool is_tag) c_fringe[3] = 0.053e-15;//F/micron c_junc[3] = 1e-15;//F/micron2 I_on_n[3] = 910.5e-6;//A/micron - I_on_p[3] = I_on_n[3] / 2;//This value for I_on_p is not really used. nmos_effective_resistance_multiplier = 1.69;//Using the value from 32nm. // n_to_p_eff_curr_drv_ratio[3] = 1.95;//Using the value from 32nm @@ -1586,7 +1562,6 @@ void init_tech_params(double technology, bool is_tag) c_fringe[0] = 0.06e-15;//F/micron MASTAR inputdynamic/3 c_junc[0] = 0;//F/micron2 MASTAR result dynamic I_on_n[0] = 2768.4e-6;//A/micron - I_on_p[0] = I_on_n[0] / 2;//A/micron //This value for I_on_p is not really used. nmos_effective_resistance_multiplier = 1.48;//nmos_effective_resistance_multiplier is the ratio of Ieff to Idsat where Ieff is the effective NMOS current and Idsat is the saturation current. n_to_p_eff_curr_drv_ratio[0] = 2; //Wpmos/Wnmos = 2 in 2007 MASTAR. Look in //"Dynamic" tab of Device workspace. @@ -1697,7 +1672,6 @@ void init_tech_params(double technology, bool is_tag) c_fringe[3] = 0.053e-15;//F/micron c_junc[3] = 1e-15;//F/micron2 I_on_n[3] = 910.5e-6;//A/micron - I_on_p[3] = I_on_n[3] / 2;//This value for I_on_p is not really used. nmos_effective_resistance_multiplier = 1.69;//Using the value from 32nm. // n_to_p_eff_curr_drv_ratio[3] = 1.95;//Using the value from 32nm diff --git a/src/gpuwattch/cacti/uca.cc b/src/gpuwattch/cacti/uca.cc index 98de312..ed9be49 100755 --- a/src/gpuwattch/cacti/uca.cc +++ b/src/gpuwattch/cacti/uca.cc @@ -215,13 +215,6 @@ double UCA::compute_delays(double inrisetime) { precharge_delay = 0; } - - double dram_array_availability = 0; - if (dp.is_dram) - { - dram_array_availability = (1 - dp.num_r_subarray * cycle_time / dp.dram_refresh_period) * 100; - } - return outrisetime; } -- cgit v1.3