From f0c49462c773613155bb40febb75f807336edb3b Mon Sep 17 00:00:00 2001
From: Mahmoud <abdallm@purdue.edu>
Date: Tue, 24 Sep 2019 12:43:49 -0400
Subject: adding traces generator

---
 src/trace-driven/gpgpusim_trace_driven_main.cc | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/trace-driven/gpgpusim_trace_driven_main.cc')

diff --git a/src/trace-driven/gpgpusim_trace_driven_main.cc b/src/trace-driven/gpgpusim_trace_driven_main.cc
index 76c2cda..82f284c 100644
--- a/src/trace-driven/gpgpusim_trace_driven_main.cc
+++ b/src/trace-driven/gpgpusim_trace_driven_main.cc
@@ -394,14 +394,14 @@ bool trace_warp_inst_t::parse_from_string(std::string trace){
 	num_operands = num_regs;
 	outcount=reg_dsts_num;
 	for(unsigned m=0; m<reg_dsts_num; ++m){
-		out[m]=reg_dest[m];
-		arch_reg.src[m]=reg_dest[m];
+		out[m]=reg_dest[m]+1;         //Increment by one because GPGPU-sim starts from R1, while SASS starts from R0
+		arch_reg.src[m]=reg_dest[m]+1;
 	}
 
 	incount=reg_srcs_num;
 	for(unsigned m=0; m<reg_srcs_num; ++m){
-		in[m]=reg_srcs[m];
-		arch_reg.src[m]=reg_srcs[m];
+		in[m]=reg_srcs[m]+1;	     //Increment by one because GPGPU-sim starts from R1, while SASS starts from R0
+		arch_reg.src[m]=reg_srcs[m]+1;
 	}
 	//handle: vector, store insts have no output, double inst and hmma, and 64 bit address
 
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