From ede0540e798bac59f65111c8d48661f042412aa8 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Wed, 27 May 2020 18:52:01 -0400 Subject: splitting trace-driven from gpgpu-sim - part 2 --- src/trace-driven/gpgpusim_trace_driven_main.cc | 62 +++++++++--- src/trace-driven/trace_driven.cc | 126 +++++++++++++++++++++---- src/trace-driven/trace_driven.h | 59 +++++++++++- 3 files changed, 216 insertions(+), 31 deletions(-) (limited to 'src/trace-driven') diff --git a/src/trace-driven/gpgpusim_trace_driven_main.cc b/src/trace-driven/gpgpusim_trace_driven_main.cc index 4a5f14a..f12d39a 100644 --- a/src/trace-driven/gpgpusim_trace_driven_main.cc +++ b/src/trace-driven/gpgpusim_trace_driven_main.cc @@ -14,6 +14,7 @@ #include "../abstract_hardware_model.h" #include "../cuda-sim/cuda-sim.h" #include "../gpgpu-sim/gpu-sim.h" +#include "../gpgpu-sim/icnt_wrapper.h" #include "../gpgpusim_entrypoint.h" #include "../option_parser.h" #include "ISA_Def/trace_opcode.h" @@ -32,11 +33,16 @@ * index info in the traces header) 5- Get rid off traces intermediate files - * change the tracer */ +gpgpu_sim* gpgpu_trace_sim_init_perf_model(int argc, const char* argv[], + gpgpu_context* m_gpgpu_context, + class trace_config* m_config); int main(int argc, const char** argv) { gpgpu_context* m_gpgpu_context = new gpgpu_context(); + trace_config tconfig; + gpgpu_sim* m_gpgpu_sim = - m_gpgpu_context->gpgpu_trace_sim_init_perf(argc, argv); + gpgpu_trace_sim_init_perf_model(argc, argv, m_gpgpu_context, &tconfig); m_gpgpu_sim->init(); // for each kernel @@ -46,12 +52,11 @@ int main(int argc, const char** argv) { // while loop till the end of the end kernel execution // prints stats - trace_parser tracer(m_gpgpu_sim->get_config().get_traces_filename(), - m_gpgpu_sim, m_gpgpu_context); - trace_config config(m_gpgpu_sim); + trace_parser tracer(tconfig.get_traces_filename(), m_gpgpu_sim, + m_gpgpu_context); + tconfig.parse_config(); std::vector commandlist = tracer.parse_kernellist_file(); - bool first_kernel = true; for (unsigned i = 0; i < commandlist.size(); ++i) { trace_kernel_info_t* kernel_info = NULL; @@ -62,12 +67,7 @@ int main(int argc, const char** argv) { m_gpgpu_sim->perf_memcpy_to_gpu(addre, Bcount); continue; } else { - // skip the first unimportant initialization kernel - if (m_gpgpu_sim->get_config().is_skip_first_kernel() && first_kernel) { - first_kernel = false; - continue; - } - kernel_info = tracer.parse_kernel_info(commandlist[i], &config); + kernel_info = tracer.parse_kernel_info(commandlist[i], &tconfig); m_gpgpu_sim->launch(kernel_info); } @@ -121,3 +121,43 @@ int main(int argc, const char** argv) { return 1; } + +gpgpu_sim* gpgpu_trace_sim_init_perf_model(int argc, const char* argv[], + gpgpu_context* m_gpgpu_context, + trace_config* m_config) { + srand(1); + print_splash(); + + option_parser_t opp = option_parser_create(); + + m_gpgpu_context->ptx_reg_options(opp); + m_gpgpu_context->func_sim->ptx_opcocde_latency_options(opp); + + icnt_reg_options(opp); + + m_gpgpu_context->the_gpgpusim->g_the_gpu_config = + new gpgpu_sim_config(m_gpgpu_context); + m_gpgpu_context->the_gpgpusim->g_the_gpu_config->reg_options( + opp); // register GPU microrachitecture options + m_config->reg_options(opp); + + option_parser_cmdline(opp, argc, argv); // parse configuration options + fprintf(stdout, "GPGPU-Sim: Configuration options:\n\n"); + option_parser_print(opp, stdout); + // Set the Numeric locale to a standard locale where a decimal point is a + // "dot" not a "comma" so it does the parsing correctly independent of the + // system environment variables + assert(setlocale(LC_NUMERIC, "C")); + m_gpgpu_context->the_gpgpusim->g_the_gpu_config->init(); + + m_gpgpu_context->the_gpgpusim->g_the_gpu = new trace_gpgpu_sim( + *(m_gpgpu_context->the_gpgpusim->g_the_gpu_config), m_gpgpu_context); + + m_gpgpu_context->the_gpgpusim->g_stream_manager = + new stream_manager((m_gpgpu_context->the_gpgpusim->g_the_gpu), + m_gpgpu_context->func_sim->g_cuda_launch_blocking); + + m_gpgpu_context->the_gpgpusim->g_simulation_starttime = time((time_t*)NULL); + + return m_gpgpu_context->the_gpgpusim->g_the_gpu; +} diff --git a/src/trace-driven/trace_driven.cc b/src/trace-driven/trace_driven.cc index 8fa63b4..d42ee65 100644 --- a/src/trace-driven/trace_driven.cc +++ b/src/trace-driven/trace_driven.cc @@ -575,25 +575,48 @@ bool trace_warp_inst_t::parse_from_string( return true; } -trace_config::trace_config(gpgpu_sim* m_gpgpu_sim) { - this->m_gpgpu_sim = m_gpgpu_sim; - parse_config(); +trace_config::trace_config() {} + +void trace_config::reg_options(option_parser_t opp) { + option_parser_register(opp, "-trace", OPT_CSTR, &g_traces_filename, + "traces kernel file" + "traces kernel file directory", + "./traces/kernelslist.g"); + + option_parser_register(opp, "-trace_opcode_latency_initiation_int", OPT_CSTR, + &trace_opcode_latency_initiation_int, + "Opcode latencies and initiation for integers in " + "trace driven mode ", + "4,1"); + option_parser_register(opp, "-trace_opcode_latency_initiation_sp", OPT_CSTR, + &trace_opcode_latency_initiation_sp, + "Opcode latencies and initiation for sp in trace " + "driven mode ", + "4,1"); + option_parser_register(opp, "-trace_opcode_latency_initiation_dp", OPT_CSTR, + &trace_opcode_latency_initiation_dp, + "Opcode latencies and initiation for dp in trace " + "driven mode ", + "4,1"); + option_parser_register(opp, "-trace_opcode_latency_initiation_sfu", OPT_CSTR, + &trace_opcode_latency_initiation_sfu, + "Opcode latencies and initiation for sfu in trace " + "driven mode ", + "4,1"); + option_parser_register(opp, "-trace_opcode_latency_initiation_tensor", + OPT_CSTR, &trace_opcode_latency_initiation_tensor, + "Opcode latencies and initiation for tensor in trace " + "driven mode ", + "4,1"); } void trace_config::parse_config() { - sscanf( - m_gpgpu_sim->getShaderCoreConfig()->trace_opcode_latency_initiation_int, - "%u,%u", &int_latency, &int_init); - sscanf(m_gpgpu_sim->getShaderCoreConfig()->trace_opcode_latency_initiation_sp, - "%u,%u", &fp_latency, &fp_init); - sscanf(m_gpgpu_sim->getShaderCoreConfig()->trace_opcode_latency_initiation_dp, - "%u,%u", &dp_latency, &dp_init); - sscanf( - m_gpgpu_sim->getShaderCoreConfig()->trace_opcode_latency_initiation_sfu, - "%u,%u", &sfu_latency, &sfu_init); - sscanf(m_gpgpu_sim->getShaderCoreConfig() - ->trace_opcode_latency_initiation_tensor, - "%u,%u", &tensor_latency, &tensor_init); + sscanf(trace_opcode_latency_initiation_int, "%u,%u", &int_latency, &int_init); + sscanf(trace_opcode_latency_initiation_sp, "%u,%u", &fp_latency, &fp_init); + sscanf(trace_opcode_latency_initiation_dp, "%u,%u", &dp_latency, &dp_init); + sscanf(trace_opcode_latency_initiation_sfu, "%u,%u", &sfu_latency, &sfu_init); + sscanf(trace_opcode_latency_initiation_tensor, "%u,%u", &tensor_latency, + &tensor_init); } void trace_config::set_latency(unsigned category, unsigned& latency, unsigned& initiation_interval) { @@ -629,6 +652,64 @@ void trace_config::set_latency(unsigned category, unsigned& latency, } } +void trace_gpgpu_sim::createSIMTCluster() { + m_cluster = new simt_core_cluster*[m_shader_config->n_simt_clusters]; + for (unsigned i = 0; i < m_shader_config->n_simt_clusters; i++) + m_cluster[i] = + new trace_simt_core_cluster(this, i, m_shader_config, m_memory_config, + m_shader_stats, m_memory_stats); +} + +void trace_simt_core_cluster::create_shader_core_ctx() { + m_core = new shader_core_ctx*[m_config->n_simt_cores_per_cluster]; + for (unsigned i = 0; i < m_config->n_simt_cores_per_cluster; i++) { + unsigned sid = m_config->cid_to_sid(i, m_cluster_id); + m_core[i] = new trace_shader_core_ctx(m_gpu, this, sid, m_cluster_id, + m_config, m_mem_config, m_stats); + m_core_sim_order.push_back(i); + } +} + +void trace_shader_core_ctx::create_shd_warp() { + m_warp.resize(m_config->max_warps_per_shader); + for (unsigned k = 0; k < m_config->max_warps_per_shader; ++k) { + m_warp[k] = new trace_shd_warp_t(this, m_config->warp_size); + } +} + +void trace_shader_core_ctx::get_pdom_stack_top_info(unsigned warp_id, + const warp_inst_t* pI, + unsigned* pc, + unsigned* rpc) { + // In trace-driven mode, we assume no control hazard + *pc = pI->pc; + *rpc = pI->pc; +} + +const active_mask_t& trace_shader_core_ctx::get_active_mask( + unsigned warp_id, const warp_inst_t* pI) { + // For Trace-driven, the active mask already set in traces, so + // just read it from the inst + return pI->get_active_mask(); +} + +unsigned trace_shader_core_ctx::sim_init_thread( + kernel_info_t& kernel, ptx_thread_info** thread_info, int sid, unsigned tid, + unsigned threads_left, unsigned num_threads, core_t* core, + unsigned hw_cta_id, unsigned hw_warp_id, gpgpu_t* gpu) { + if (kernel.no_more_ctas_to_run()) { + return 0; // finished! + } + + if (kernel.more_threads_in_cta()) { + kernel.increment_thread_id(); + } + + if (!kernel.more_threads_in_cta()) kernel.increment_cta_id(); + + return 1; +} + void trace_shader_core_ctx::init_warps(unsigned cta_id, unsigned start_thread, unsigned end_thread, unsigned ctaid, int cta_size, kernel_info_t& kernel) { @@ -644,6 +725,19 @@ void trace_shader_core_ctx::init_warps(unsigned cta_id, unsigned start_thread, init_traces(start_warp, end_warp, kernel); } +const warp_inst_t* trace_shader_core_ctx::get_next_inst(unsigned warp_id, + address_type pc) { + // read the inst from the traces + trace_shd_warp_t* m_trace_warp = + static_cast(m_warp[warp_id]); + return m_trace_warp->get_next_trace_inst(); +} + +void trace_shader_core_ctx::updateSIMTStack(unsigned warpId, + warp_inst_t* inst) { + // No SIMT-stack in trace-driven mode +} + void trace_shader_core_ctx::init_traces(unsigned start_warp, unsigned end_warp, kernel_info_t& kernel) { std::vector*> threadblock_traces; diff --git a/src/trace-driven/trace_driven.h b/src/trace-driven/trace_driven.h index a35cd83..ea315a1 100644 --- a/src/trace-driven/trace_driven.h +++ b/src/trace-driven/trace_driven.h @@ -36,6 +36,7 @@ class trace_warp_inst_t : public warp_inst_t { m_gpgpu_context = NULL; m_opcode = 0; m_tconfig = NULL; + should_do_atomic = false; } trace_warp_inst_t(const class core_config* config, @@ -44,6 +45,7 @@ class trace_warp_inst_t : public warp_inst_t { m_gpgpu_context = gpgpu_context; m_opcode = 0; m_tconfig = tconfig; + should_do_atomic = false; } bool parse_from_string( @@ -80,16 +82,24 @@ class trace_kernel_info_t : public kernel_info_t { class trace_config { public: - trace_config(gpgpu_sim* m_gpgpu_sim); + trace_config(); void set_latency(unsigned category, unsigned& latency, unsigned& initiation_interval); void parse_config(); + void reg_options(option_parser_t opp); + char* get_traces_filename() { return g_traces_filename; } private: unsigned int_latency, fp_latency, dp_latency, sfu_latency, tensor_latency; unsigned int_init, fp_init, dp_init, sfu_init, tensor_init; - gpgpu_sim* m_gpgpu_sim; + + char* g_traces_filename; + char* trace_opcode_latency_initiation_int; + char* trace_opcode_latency_initiation_sp; + char* trace_opcode_latency_initiation_dp; + char* trace_opcode_latency_initiation_sfu; + char* trace_opcode_latency_initiation_tensor; }; class trace_parser { @@ -130,6 +140,30 @@ class trace_shd_warp_t : public shd_warp_t { unsigned trace_pc; }; +class trace_gpgpu_sim : public gpgpu_sim { + public: + trace_gpgpu_sim(const gpgpu_sim_config& config, gpgpu_context* ctx) + : gpgpu_sim(config, ctx) { + createSIMTCluster(); + } + + virtual void createSIMTCluster(); +}; + +class trace_simt_core_cluster : public simt_core_cluster { + public: + trace_simt_core_cluster(class gpgpu_sim* gpu, unsigned cluster_id, + const shader_core_config* config, + const memory_config* mem_config, + class shader_core_stats* stats, + class memory_stats_t* mstats) + : simt_core_cluster(gpu, cluster_id, config, mem_config, stats, mstats) { + create_shader_core_ctx(); + } + + virtual void create_shader_core_ctx(); +}; + class trace_shader_core_ctx : public shader_core_ctx { public: trace_shader_core_ctx(class gpgpu_sim* gpu, class simt_core_cluster* cluster, @@ -138,7 +172,12 @@ class trace_shader_core_ctx : public shader_core_ctx { const memory_config* mem_config, shader_core_stats* stats) : shader_core_ctx(gpu, cluster, shader_id, tpc_id, config, mem_config, - stats) {} + stats) { + create_front_pipeline(); + create_shd_warp(); + create_schedulers(); + create_exec_pipeline(); + } virtual void checkExecutionStatusAndUpdate(warp_inst_t& inst, unsigned t, unsigned tid); @@ -146,7 +185,19 @@ class trace_shader_core_ctx : public shader_core_ctx { unsigned end_thread, unsigned ctaid, int cta_size, kernel_info_t& kernel); virtual void func_exec_inst(warp_inst_t& inst); - friend class shader_core_ctx; + virtual unsigned sim_init_thread(kernel_info_t& kernel, + ptx_thread_info** thread_info, int sid, + unsigned tid, unsigned threads_left, + unsigned num_threads, core_t* core, + unsigned hw_cta_id, unsigned hw_warp_id, + gpgpu_t* gpu); + virtual void create_shd_warp(); + virtual const warp_inst_t* get_next_inst(unsigned warp_id, address_type pc); + virtual void updateSIMTStack(unsigned warpId, warp_inst_t* inst); + virtual void get_pdom_stack_top_info(unsigned warp_id, const warp_inst_t* pI, + unsigned* pc, unsigned* rpc); + virtual const active_mask_t& get_active_mask(unsigned warp_id, + const warp_inst_t* pI); private: void init_traces(unsigned start_warp, unsigned end_warp, -- cgit v1.3