From 177afa15266ddcc87cc60ecda552717e07197eaa Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Fri, 20 Sep 2019 15:17:56 -0400 Subject: removing some comments and refectoring the code --- src/abstract_hardware_model.cc | 7 ++--- src/cuda-sim/ptx-stats.cc | 24 +++++++++------ src/gpgpu-sim/mem_latency_stat.cc | 6 ++-- src/gpgpu-sim/shader.cc | 4 --- src/trace-driven/gpgpusim_trace_driven_main.cc | 41 +++++--------------------- src/trace-driven/trace_driven.h | 16 +++------- 6 files changed, 32 insertions(+), 66 deletions(-) (limited to 'src') diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc index 063aa8d..758ec00 100644 --- a/src/abstract_hardware_model.cc +++ b/src/abstract_hardware_model.cc @@ -471,8 +471,7 @@ void warp_inst_t::generate_mem_accesses() } if ( space.get_type() == global_space ) { - //TO DO: check here - // m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_uncoalesced_gmem( pc, m_accessq.size() - starting_queue_size ); + m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_uncoalesced_gmem( pc, m_accessq.size() - starting_queue_size ); } m_mem_accesses_created=true; } @@ -707,9 +706,7 @@ void warp_inst_t::completed( unsigned long long cycle ) const { unsigned long long latency = cycle - issue_cycle; assert(latency <= cycle); // underflow detection - //check the trace mode here - //TO DO - //m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_latency(pc, latency * active_count()); + m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_latency(pc, latency * active_count()); } diff --git a/src/cuda-sim/ptx-stats.cc b/src/cuda-sim/ptx-stats.cc index 22517df..2af65e5 100644 --- a/src/cuda-sim/ptx-stats.cc +++ b/src/cuda-sim/ptx-stats.cc @@ -154,8 +154,9 @@ void ptx_file_line_stats_add_exec_count(const ptx_instruction *pInsn) void ptx_stats::ptx_file_line_stats_add_latency(unsigned pc, unsigned latency) { const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc); - - ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].latency += latency; + + if(pInsn != NULL) + ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].latency += latency; } // attribute dram traffic to this ptx instruction (specified by the pc) @@ -164,7 +165,8 @@ void ptx_stats::ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_ { const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc); - ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].dram_traffic += dram_traffic; + if(pInsn != NULL) + ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].dram_traffic += dram_traffic; } // attribute the number of shared memory access cycles to a ptx instruction @@ -173,9 +175,11 @@ void ptx_stats::ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned { const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc); - ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())]; - line_stats.smem_n_way_bank_conflict_total += n_way_bkconflict; - line_stats.smem_warp_count += 1; + if(pInsn != NULL) { + ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())]; + line_stats.smem_n_way_bank_conflict_total += n_way_bkconflict; + line_stats.smem_warp_count += 1; + } } // attribute a non-coalesced mem access to a ptx instruction @@ -184,9 +188,11 @@ void ptx_stats::ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n { const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc); - ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())]; - line_stats.gmem_n_access_total += n_access; - line_stats.gmem_warp_count += 1; + if(pInsn != NULL) { + ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())]; + line_stats.gmem_n_access_total += n_access; + line_stats.gmem_warp_count += 1; + } } // a class that tracks the inflight memory instructions of a shader core diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc index 1980a3b..2141e10 100644 --- a/src/gpgpu-sim/mem_latency_stat.cc +++ b/src/gpgpu-sim/mem_latency_stat.cc @@ -195,9 +195,9 @@ void memory_stats_t::memlatstat_dram_access(mem_fetch *mf) } mem_access_type_stats[mf->get_access_type()][dram_id][bank]++; } - //TO DO: check here - //if (mf->get_pc() != (unsigned)-1) - // m_gpu->gpgpu_ctx->stats->ptx_file_line_stats_add_dram_traffic(mf->get_pc(), mf->get_data_size()); + + if (mf->get_pc() != (unsigned)-1) + m_gpu->gpgpu_ctx->stats->ptx_file_line_stats_add_dram_traffic(mf->get_pc(), mf->get_data_size()); } void memory_stats_t::memlatstat_icnt2mem_pop(mem_fetch *mf) diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 8dddc36..cc85f3f 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -3290,10 +3290,6 @@ void barrier_set_t::deallocate_barrier( unsigned cta_id ) warp_set_t at_barrier = warps & m_warp_at_barrier; assert( at_barrier.any() == false ); // no warps stuck at barrier warp_set_t active = warps & m_warp_active; - std::cout<clear(); } - //unsigned warps_per_tb = ceil(float(threads_per_cta()/32)); - //threadblock_traces.resize(warps_per_tb); unsigned block_id_x=0, block_id_y=0, block_id_z=0; unsigned warp_id=0; @@ -273,11 +263,9 @@ bool trace_kernel_info_t::get_next_threadblock_traces(std::vectorreserve(insts_num); - //std::cout << line << std::endl; } else { assert(start_of_tb_stream_found); trace_warp_inst_t inst(m_gpgpu_sim->getShaderCoreConfig(), m_gpgpu_context); - //std::cout<push_back(inst); } @@ -329,16 +314,15 @@ bool trace_warp_inst_t::parse_from_string(std::string trace){ unsigned mem_width=0; unsigned long long mem_addresses[warp_size()]; + //Start Parsing ss>>std::dec>>threadblock_x>>threadblock_y>>threadblock_z>>warpid_tb>>sm_id>>warpid_sm; - ss>>std::hex>>m_pc>>mask; - //std::cout<<"m_pc= "<>opcode; ss>>reg_srcs_num; - for(unsigned i=0; i>temp; sscanf(temp.c_str(), "R%d", ®_srcs[i]); @@ -365,7 +348,7 @@ bool trace_warp_inst_t::parse_from_string(std::string trace){ mem_addresses[s]=0; } } - + //Finish Parsing //After parsing, fill the inst_t and warp_inst_t params //fill active mask @@ -378,7 +361,6 @@ bool trace_warp_inst_t::parse_from_string(std::string trace){ //fill and initialize common params m_decoded = true; pc = (address_type)m_pc; //we will lose the high 32 bits from casting long to unsigned, it should be okay! - //std::cout<<"pc= "< m_trace_warp; + friend class shader_core_ctx; private: - + std::vector m_trace_warp; }; -- cgit v1.3