From 9c0156bd732fe370d5022ca036fff515fcd9d2d4 Mon Sep 17 00:00:00 2001 From: Aaron M Barnes Date: Mon, 10 May 2021 22:58:05 -0400 Subject: more cleanup --- src/gpgpu-sim/shader.cc | 4 ++-- src/gpgpu-sim/shader.h | 5 +---- 2 files changed, 3 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index e3a3e9c..9eab7fc 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -3996,7 +3996,7 @@ void opndcoll_rfu_t::allocate_cu(unsigned port_num) { } for (unsigned k = cuLowerBound; k < cuUpperBound; k++) { if (cu_set[k].is_free()) { - //std::cout << "Allocated schd_id: " << schd_id << " on cu: " << k << std::endl; + // std::cout << "Allocated schd_id: " << schd_id << " on cu: " << k << std::endl; collector_unit_t *cu = &cu_set[k]; allocated = cu->allocate(inp.m_in[i], inp.m_out[i]); m_arbiter.add_read_requests(cu); @@ -4130,7 +4130,7 @@ void opndcoll_rfu_t::collector_unit_t::dispatch() { << "\tto execution register: " << m_output_register->get_name() << "\treg id: " - << reg_id + << this->get_reg_id() << std::endl; */ m_output_register->move_in(m_sub_core_model, m_reg_id, m_warp); m_free = true; diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 00e7deb..7655cb9 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -922,10 +922,7 @@ class opndcoll_rfu_t { // operand collector based register file unit collector_unit_t *find_ready(bool sub_core_model) { for (unsigned n = 0; n < m_num_collectors; n++) { unsigned c = (m_last_cu + n + 1) % m_num_collectors; - unsigned reg_id; - if (sub_core_model) - reg_id = (*m_collector_units)[c].get_reg_id(); - if ((*m_collector_units)[c].ready(sub_core_model, reg_id)) { + if ((*m_collector_units)[c].ready()) { m_last_cu = c; return &((*m_collector_units)[c]); } -- cgit v1.3