From bcbfad7e45fd0dc4a48f8f8beee03aa4fd8f201a Mon Sep 17 00:00:00 2001 From: Ahmed El-Shafiey Date: Sun, 9 Dec 2012 19:48:05 -0800 Subject: Merging //depot/gpgpu_sim_research/fermi_power/... to //depot/gpgpu_sim_research/fermi/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14777] --- src/gpgpu-sim/gpu-sim.cc | 52 +++++++++++++++++--------------- src/gpgpu-sim/gpu-sim.h | 67 ++++++++++++++++++++--------------------- src/gpgpu-sim/power_interface.h | 2 +- 3 files changed, 61 insertions(+), 60 deletions(-) (limited to 'src') diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 9d3145b..bb3dc8b 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -311,19 +311,19 @@ void shader_core_config::reg_options(class OptionParser * opp) "1"); option_parser_register(opp, "-gpgpu_pipeline_widths", OPT_CSTR, &pipeline_widths_string, "Pipeline widths " - "ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB", + "ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB", "1,1,1,1,1,1,1" ); option_parser_register(opp, "-gpgpu_num_sp_units", OPT_INT32, &gpgpu_num_sp_units, - "Number of SP units (default=1)", - "1"); + "Number of SP units (default=1)", + "1"); option_parser_register(opp, "-gpgpu_num_sfu_units", OPT_INT32, &gpgpu_num_sfu_units, - "Number of SF units (default=1)", - "1"); + "Number of SF units (default=1)", + "1"); option_parser_register(opp, "-gpgpu_num_mem_units", OPT_INT32, &gpgpu_num_mem_units, - "Number if ldst units (default=1) WARNING: not hooked up to anything", + "Number if ldst units (default=1) WARNING: not hooked up to anything", "1"); option_parser_register(opp, "-gpgpu_scheduler", OPT_CSTR, &gpgpu_scheduler_string, - "Scheduler configuration: lrr|tl:num_active_warps default: lrr", + "Scheduler configuration: lrr|tl:num_active_warps default: lrr", "lrr"); } @@ -727,7 +727,9 @@ void gpgpu_sim::gpu_print_stat() m_shader_stats->print(stdout); #ifdef GPGPUSIM_POWER_MODEL - m_gpgpusim_wrapper->print_power_kernel_stats(gpu_sim_cycle,gpu_tot_sim_cycle,gpu_tot_sim_insn + gpu_sim_insn ); + if(m_config.g_power_simulation_enabled){ + m_gpgpusim_wrapper->print_power_kernel_stats(gpu_sim_cycle,gpu_tot_sim_cycle,gpu_tot_sim_insn + gpu_sim_insn ); + } #endif // performance counter that are not local to one shader @@ -747,7 +749,9 @@ void gpgpu_sim::gpu_print_stat() } #ifdef GPGPUSIM_POWER_MODEL - m_gpgpusim_wrapper->detect_print_steady_state(1,gpu_tot_sim_insn+gpu_sim_insn); + if(m_config.g_power_simulation_enabled){ + m_gpgpusim_wrapper->detect_print_steady_state(1,gpu_tot_sim_insn+gpu_sim_insn); + } #endif @@ -755,7 +759,7 @@ void gpgpu_sim::gpu_print_stat() unsigned total_mem_to_simt=0; unsigned total_simt_to_mem=0; for (unsigned i=0;im_n_mem;i++){ - unsigned temp=0; + unsigned temp=0; m_memory_partition_unit[i]->set_icnt_power_stats(temp); total_mem_to_simt += temp; } @@ -966,8 +970,8 @@ void gpgpu_sim::cycle() m_memory_partition_unit[i]->dram_cycle(); // Issue the dram command (scheduler + delay model) // Update performance counters for DRAM m_memory_partition_unit[i]->set_dram_power_stats(m_power_stats->pwr_mem_stat->n_cmd[0][i], m_power_stats->pwr_mem_stat->n_activity[0][i], - m_power_stats->pwr_mem_stat->n_nop[0][i], m_power_stats->pwr_mem_stat->n_act[0][i], m_power_stats->pwr_mem_stat->n_pre[0][i], - m_power_stats->pwr_mem_stat->n_rd[0][i], m_power_stats->pwr_mem_stat->n_wr[0][i], m_power_stats->pwr_mem_stat->n_req[0][i]); + m_power_stats->pwr_mem_stat->n_nop[0][i], m_power_stats->pwr_mem_stat->n_act[0][i], m_power_stats->pwr_mem_stat->n_pre[0][i], + m_power_stats->pwr_mem_stat->n_rd[0][i], m_power_stats->pwr_mem_stat->n_wr[0][i], m_power_stats->pwr_mem_stat->n_req[0][i]); } } @@ -1007,11 +1011,11 @@ void gpgpu_sim::cycle() } float temp=0; for (unsigned i=0;inum_shader();i++){ - temp+=m_shader_stats->m_pipeline_duty_cycle[i]; + temp+=m_shader_stats->m_pipeline_duty_cycle[i]; } temp=temp/m_shader_config->num_shader(); *average_pipeline_duty_cycle=((*average_pipeline_duty_cycle)+temp); - //cout<<"Average pipeline duty cycle: "<<*average_pipeline_duty_cycle<= g_single_step) ) { @@ -1024,7 +1028,7 @@ void gpgpu_sim::cycle() // McPAT main cycle (interface with McPAT) #ifdef GPGPUSIM_POWER_MODEL if(m_config.g_power_simulation_enabled){ - mcpat_cycle(m_config, getShaderCoreConfig(), m_gpgpusim_wrapper, m_power_stats, m_config.gpu_stat_sample_freq, gpu_tot_sim_cycle, gpu_sim_cycle, gpu_tot_sim_insn, gpu_sim_insn); + mcpat_cycle(m_config, getShaderCoreConfig(), m_gpgpusim_wrapper, m_power_stats, m_config.gpu_stat_sample_freq, gpu_tot_sim_cycle, gpu_sim_cycle, gpu_tot_sim_insn, gpu_sim_insn); } #endif @@ -1035,21 +1039,21 @@ void gpgpu_sim::cycle() if (m_config.gpgpu_flush_l1_cache) { for (unsigned i=0;in_simt_clusters;i++) { if (m_cluster[i]->get_not_completed() == 0) - m_cluster[i]->cache_flush(); + m_cluster[i]->cache_flush(); else all_threads_complete = 0 ; } } if(m_config.gpgpu_flush_l2_cache){ - if(!m_config.gpgpu_flush_l1_cache){ - for (unsigned i=0;in_simt_clusters;i++) { - if (m_cluster[i]->get_not_completed() != 0){ - all_threads_complete = 0 ; - break; - } - } - } + if(!m_config.gpgpu_flush_l1_cache){ + for (unsigned i=0;in_simt_clusters;i++) { + if (m_cluster[i]->get_not_completed() != 0){ + all_threads_complete = 0 ; + break; + } + } + } if (all_threads_complete && !m_memory_config->m_L2_config.disabled() ) { printf("Flushed L2 caches...\n"); diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 98f719f..7fad76d 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -80,35 +80,32 @@ struct power_config { void init() { - if (!g_power_simulation_enabled) - return; - - // initialize file name if it is not set - time_t curr_time; - time(&curr_time); - char *date = ctime(&curr_time); - char *s = date; - while (*s) { - if (*s == ' ' || *s == '\t' || *s == ':') *s = '-'; - if (*s == '\n' || *s == '\r' ) *s = 0; - s++; - } - char buf1[1024]; - snprintf(buf1,1024,"gpgpusim_power_report__%s.log",date); - g_power_filename = strdup(buf1); - char buf2[1024]; - snprintf(buf2,1024,"gpgpusim_power_trace_report__%s.log.gz",date); - g_power_trace_filename = strdup(buf2); - char buf3[1024]; - snprintf(buf3,1024,"gpgpusim_metric_trace_report__%s.log.gz",date); - g_metric_trace_filename = strdup(buf3); - char buf4[1024]; - snprintf(buf4,1024,"gpgpusim_steady_state_tracking_report__%s.log.gz",date); - g_steady_state_tracking_filename = strdup(buf4); - - if(g_steady_power_levels_enabled){ - sscanf(gpu_steady_state_definition,"%lf:%lf", &gpu_steady_power_deviation,&gpu_steady_min_period); - } + // initialize file name if it is not set + time_t curr_time; + time(&curr_time); + char *date = ctime(&curr_time); + char *s = date; + while (*s) { + if (*s == ' ' || *s == '\t' || *s == ':') *s = '-'; + if (*s == '\n' || *s == '\r' ) *s = 0; + s++; + } + char buf1[1024]; + snprintf(buf1,1024,"gpgpusim_power_report__%s.log",date); + g_power_filename = strdup(buf1); + char buf2[1024]; + snprintf(buf2,1024,"gpgpusim_power_trace_report__%s.log.gz",date); + g_power_trace_filename = strdup(buf2); + char buf3[1024]; + snprintf(buf3,1024,"gpgpusim_metric_trace_report__%s.log.gz",date); + g_metric_trace_filename = strdup(buf3); + char buf4[1024]; + snprintf(buf4,1024,"gpgpusim_steady_state_tracking_report__%s.log.gz",date); + g_steady_state_tracking_filename = strdup(buf4); + + if(g_steady_power_levels_enabled){ + sscanf(gpu_steady_state_definition,"%lf:%lf", &gpu_steady_power_deviation,&gpu_steady_min_period); + } //NOTE: After changing the nonlinear model to only scaling idle core, //NOTE: The min_inc_per_active_sm is not used any more @@ -192,12 +189,12 @@ struct memory_config { option_parser_destroy(dram_opp); } - int nbkt = nbk/nbkgrp; - unsigned i; - for (i=0; nbkt>0; i++) { - nbkt = nbkt>>1; - } - bk_tag_length = i; + int nbkt = nbk/nbkgrp; + unsigned i; + for (i=0; nbkt>0; i++) { + nbkt = nbkt>>1; + } + bk_tag_length = i; assert(nbkgrp>0 && "Number of bank groups cannot be zero"); tRCDWR = tRCD-(WL+1); tRTW = (CL+(BL/data_command_freq_ratio)+2-WL); diff --git a/src/gpgpu-sim/power_interface.h b/src/gpgpu-sim/power_interface.h index 3033743..9bce430 100644 --- a/src/gpgpu-sim/power_interface.h +++ b/src/gpgpu-sim/power_interface.h @@ -37,7 +37,7 @@ void init_mcpat(const gpgpu_sim_config &config, class gpgpu_sim_wrapper *wrapper, unsigned stat_sample_freq, unsigned tot_inst, unsigned inst); void mcpat_cycle(const gpgpu_sim_config &config, const struct shader_core_config *shdr_config, class gpgpu_sim_wrapper *wrapper, class power_stat_t *power_stats, - unsigned stat_sample_freq, unsigned tot_cycle, unsigned cycle, unsigned tot_inst, unsigned inst); +unsigned stat_sample_freq, unsigned tot_cycle, unsigned cycle, unsigned tot_inst, unsigned inst); #endif /* POWER_INTERFACE_H_ */ -- cgit v1.3