From f0ad71cfdfe4675b02a948c7d3547da0ddce60e9 Mon Sep 17 00:00:00 2001 From: Aaron M Barnes Date: Tue, 15 Feb 2022 08:34:16 -0500 Subject: set default max concurrent ctas to 32 and validate --- src/abstract_hardware_model.h | 1 + src/gpgpu-sim/gpu-sim.cc | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index e9d7c76..6e4a87d 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -291,6 +291,7 @@ class kernel_info_t { m_next_tid.x < m_block_dim.x; } unsigned get_uid() const { return m_uid; } + std::string get_name() const { return name(); } std::string name() const; std::list &active_threads() { diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index ee243c1..8284ad3 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -395,7 +395,7 @@ void shader_core_config::reg_options(class OptionParser *opp) { "gpgpu_ignore_resources_limitation (default 0)", "0"); option_parser_register( opp, "-gpgpu_shader_cta", OPT_UINT32, &max_cta_per_core, - "Maximum number of concurrent CTAs in shader (default 8)", "8"); + "Maximum number of concurrent CTAs in shader (default 32)", "32"); option_parser_register( opp, "-gpgpu_num_cta_barriers", OPT_UINT32, &max_barriers_per_cta, "Maximum number of named barriers per CTA (default 16)", "16"); @@ -1639,9 +1639,9 @@ bool shader_core_ctx::occupy_shader_resource_1block(kernel_info_t &k, SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %u threads, %u shared mem, %u " - "registers, %u ctas\n", + "registers, %u ctas, on shader %d\n", m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, - m_occupied_ctas); + m_occupied_ctas, m_sid); } return true; @@ -1807,9 +1807,9 @@ void shader_core_ctx::issue_block2core(kernel_info_t &kernel) { shader_CTA_count_log(m_sid, 1); SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: cta:%2u, start_tid:%4u, end_tid:%4u, " - "initialized @(%lld,%lld)\n", + "initialized @(%lld,%lld), kernel_uid:%u, kernel_name:%s\n", free_cta_hw_id, start_thread, end_thread, m_gpu->gpu_sim_cycle, - m_gpu->gpu_tot_sim_cycle); + m_gpu->gpu_tot_sim_cycle, kernel.get_uid(), kernel.get_name().c_str()); } /////////////////////////////////////////////////////////////////////////////////////////// -- cgit v1.3 From 43198e9c34c4ac2c215c90f9b9768b737b23e429 Mon Sep 17 00:00:00 2001 From: Aaron M Barnes Date: Fri, 18 Feb 2022 00:49:47 -0500 Subject: fix trace-driven concurrency segfault --- src/gpgpu-sim/shader.cc | 4 +++- src/gpgpu-sim/shader.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 9f8a129..814311d 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -951,7 +951,7 @@ void shader_core_ctx::fetch() { m_threadState[tid].m_active = false; unsigned cta_id = m_warp[warp_id]->get_cta_id(); if (m_thread[tid] == NULL) { - register_cta_thread_exit(cta_id, m_kernel); + register_cta_thread_exit(cta_id, m_warp[warp_id]->get_kernel_info()); } else { register_cta_thread_exit(cta_id, &(m_thread[tid]->get_kernel())); @@ -3898,6 +3898,8 @@ void shader_core_ctx::get_icnt_power_stats(long &n_simt_to_mem, n_mem_to_simt += m_stats->n_mem_to_simt[m_sid]; } +kernel_info_t* shd_warp_t::get_kernel_info() const { return m_shader->get_kernel_info(); } + bool shd_warp_t::functional_done() const { return get_n_completed() == m_warp_size; } diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index d80476f..c3e6f93 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -171,6 +171,7 @@ class shd_warp_t { void clear_membar() { m_membar = false; } bool get_membar() const { return m_membar; } virtual address_type get_pc() const { return m_next_pc; } + virtual kernel_info_t* get_kernel_info() const; void set_next_pc(address_type pc) { m_next_pc = pc; } void store_info_of_last_inst_at_barrier(const warp_inst_t *pI) { -- cgit v1.3 From 8f71be8754506aa37ad905c2958915a1256375c3 Mon Sep 17 00:00:00 2001 From: Aaron M Barnes Date: Fri, 18 Feb 2022 10:14:39 -0500 Subject: update max_concurrent kernel based on compute capability --- configs/tested-cfgs/SM7_QV100/gpgpusim.config | 1 + src/gpgpu-sim/gpu-sim.cc | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/configs/tested-cfgs/SM7_QV100/gpgpusim.config b/configs/tested-cfgs/SM7_QV100/gpgpusim.config index 76c99b7..8d2b101 100644 --- a/configs/tested-cfgs/SM7_QV100/gpgpusim.config +++ b/configs/tested-cfgs/SM7_QV100/gpgpusim.config @@ -50,6 +50,7 @@ -gpgpu_runtime_pending_launch_count_limit 2048 -gpgpu_kernel_launch_latency 5000 -gpgpu_TB_launch_latency 0 +-gpgpu_max_concurrent_kernel 128 # Compute Capability -gpgpu_compute_capability_major 7 diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 8284ad3..5af244b 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -701,7 +701,8 @@ void gpgpu_sim_config::reg_options(option_parser_t opp) { "500.0:2000.0:2000.0:2000.0"); option_parser_register( opp, "-gpgpu_max_concurrent_kernel", OPT_INT32, &max_concurrent_kernel, - "maximum kernels that can run concurrently on GPU", "8"); + "maximum kernels that can run concurrently on GPU, set this value " + "according to max resident grids for your compute capability", "32"); option_parser_register( opp, "-gpgpu_cflog_interval", OPT_INT32, &gpgpu_cflog_interval, "Interval between each snapshot in control flow logger", "0"); -- cgit v1.3