// $Id: mesh88_lat 5506 2013-05-07 21:22:23Z qtedq $ // Copyright (c) 2007-2012, Trustees of The Leland Stanford Junior University // All rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are met: // // Redistributions of source code must retain the above copyright notice, this // list of conditions and the following disclaimer. // Redistributions in binary form must reproduce the above copyright notice, // this list of conditions and the following disclaimer in the documentation // and/or other materials provided with the distribution. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. //8X8 mesh with 20 flits per packet under injection mode //injection rate here is packet per cycle, NOT flit per cycle // Topology topology = mesh; k = 8; n = 2; // Routing routing_function = dor; // Flow control num_vcs = 8; vc_buf_size = 8; wait_for_tail_credit = 1; // Router architecture vc_allocator = islip; sw_allocator = islip; alloc_iters = 1; credit_delay = 2; routing_delay = 0; vc_alloc_delay = 1; sw_alloc_delay = 1; input_speedup = 2; output_speedup = 1; internal_speedup = 1.0; // Traffic traffic = transpose; packet_size = 20; // Simulation sim_type = latency; injection_rate = 0.005;