diff options
| author | Mahmoud <[email protected]> | 2019-08-26 14:11:16 -0400 |
|---|---|---|
| committer | Mahmoud <[email protected]> | 2019-08-26 14:11:16 -0400 |
| commit | 2e2b0911f8cc9d172e4602765ce4c20ffb583cf0 (patch) | |
| tree | b07f5f95118edcee46c7f0ff0b60fae3a9cfb363 | |
| parent | da0c8dff3b4e89acaf2f2dd31bf8940ab4a1e71c (diff) | |
update titanV config file
| -rw-r--r-- | configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index f8e4afe..888ce71 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -87,7 +87,7 @@ # if the assigned shd mem = 0, then L1 cache = 128KB # For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x # disable this mode in case of multi kernels/apps execution --adaptive_volta_cache_config 1 +-adaptive_cache_config 1 # Volta unified cache has four banks -l1_banks 4 #-mem_unit_ports 4 |