Changed bsmad_impl to match Ahmed's output. Added latency and initiation_interval numbers for bsmad

3 files changed, 44 insertions, 17 deletions

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 53ee25b..4bae236 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -66,9 +66,9 @@ char *opcode_initiation_int, *opcode_initiation_fp, *opcode_initiation_dp;
 
 void ptx_opcocde_latency_options (option_parser_t opp) {
 	option_parser_register(opp, "-ptx_opcode_latency_int", OPT_CSTR, &opcode_latency_int,
-			"Opcode latencies for integers <ADD,MAX,MUL,MAD,DIV>"
-			"Default 1,1,19,25,145",
-			"1,1,19,25,145");
+			"Opcode latencies for integers <ADD,MAX,MUL,MAD,DIV,BSMAD>"
+			"Default 1,1,19,25,145,1",
+			"1,1,19,25,145,1");
 	option_parser_register(opp, "-ptx_opcode_latency_fp", OPT_CSTR, &opcode_latency_fp,
 			"Opcode latencies for single precision floating points <ADD,MAX,MUL,MAD,DIV>"
 			"Default 1,1,1,1,30",
@@ -78,9 +78,9 @@ void ptx_opcocde_latency_options (option_parser_t opp) {
 			"Default 8,8,8,8,335",
 			"8,8,8,8,335");
 	option_parser_register(opp, "-ptx_opcode_initiation_int", OPT_CSTR, &opcode_initiation_int,
-			"Opcode initiation intervals for integers <ADD,MAX,MUL,MAD,DIV>"
-			"Default 1,1,4,4,32",
-			"1,1,4,4,32");
+			"Opcode initiation intervals for integers <ADD,MAX,MUL,MAD,DIV,BSMAD>"
+			"Default 1,1,4,4,32,1",
+			"1,1,4,4,32,1");
 	option_parser_register(opp, "-ptx_opcode_initiation_fp", OPT_CSTR, &opcode_initiation_fp,
 			"Opcode initiation intervals for single precision floating points <ADD,MAX,MUL,MAD,DIV>"
 			"Default 1,1,1,1,5",
@@ -580,10 +580,10 @@ void ptx_instruction::set_bar_type()
 
 void ptx_instruction::set_opcode_and_latency()
 {
-	unsigned int_latency[5];
+	unsigned int_latency[6];
 	unsigned fp_latency[5];
 	unsigned dp_latency[5];
-	unsigned int_init[5];
+	unsigned int_init[6];
 	unsigned fp_init[5];
 	unsigned dp_init[5];
 	/*
@@ -592,19 +592,20 @@ void ptx_instruction::set_opcode_and_latency()
 	 * [2] MUL
 	 * [3] MAD
 	 * [4] DIV
+	 * [5] BSMAD
 	 */
-	sscanf(opcode_latency_int, "%u,%u,%u,%u,%u",
+	sscanf(opcode_latency_int, "%u,%u,%u,%u,%u,%u",
 			&int_latency[0],&int_latency[1],&int_latency[2],
-			&int_latency[3],&int_latency[4]);
+			&int_latency[3],&int_latency[4],&int_latency[5]);
 	sscanf(opcode_latency_fp, "%u,%u,%u,%u,%u",
 			&fp_latency[0],&fp_latency[1],&fp_latency[2],
 			&fp_latency[3],&fp_latency[4]);
 	sscanf(opcode_latency_dp, "%u,%u,%u,%u,%u",
 			&dp_latency[0],&dp_latency[1],&dp_latency[2],
 			&dp_latency[3],&dp_latency[4]);
-	sscanf(opcode_initiation_int, "%u,%u,%u,%u,%u",
+	sscanf(opcode_initiation_int, "%u,%u,%u,%u,%u,%u",
 			&int_init[0],&int_init[1],&int_init[2],
-			&int_init[3],&int_init[4]);
+			&int_init[3],&int_init[4],&int_init[5]);
 	sscanf(opcode_initiation_fp, "%u,%u,%u,%u,%u",
 			&fp_init[0],&fp_init[1],&fp_init[2],
 			&fp_init[3],&fp_init[4]);
@@ -773,6 +774,10 @@ void ptx_instruction::set_opcode_and_latency()
 	  initiation_interval = dp_init[2];
       op = SFU_OP;
       break;
+   case BSMAD_OP:
+	   latency = int_latency[5];
+	   initiation_interval = int_init[5];
+	   break;
    default: 
        break;
    }
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 3b938bb..bb15621 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -1458,6 +1458,26 @@ void breakaddr_impl( const ptx_instruction *pI, ptx_thread_info *thread )
 void brev_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
 void brkpt_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
 
+unsigned trunc(unsigned num, unsigned precision) {
+	int mask = 1, latest_one = -1;
+	unsigned data = num;
+	for (unsigned j = 0; j < sizeof(unsigned)*8; j++) {
+		int bit = data & mask;
+		if (bit == 1) latest_one = j;
+		data >>= 1;
+	}
+	if (latest_one >= precision) {
+		// round_up is 1 if the most significant truncated digit is a 1, otherwise it is 0
+		//int round_up = (num & (1 << (latest_one-precision))) >> (latest_one-precision);
+		//unsigned shifted_output = num >> (latest_one-precision+1);
+		// if shifted_output is a number like 1111, don't round up
+		//if (shifted_output == (pow(2,precision)-1)) round_up = 0;
+		//num = shifted_output + round_up;
+		num >>= (latest_one-precision+1);
+	}
+	return num;
+}
+
 void bsmad_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 {
 	// operands:
@@ -1530,16 +1550,18 @@ void bsmad_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			int sum = 0;
 			unsigned mask = (unsigned)(pow(2,ip)-1) << (pos*ip);
 			for (int j = 0; j < THREADS; j++) {
-				sum += ((mask & buffer[j][buf]) >> (pos*ip)) * synapse[j];
+				//sum += ((mask & buffer[j][buf]) >> (pos*ip)) * synapse[j];
+				sum += trunc(((mask & buffer[j][buf]) >> (pos*ip)) * synapse[j], op);
 			}
 			// get the previous output
 			mask = (unsigned)(pow(2,op)-1) << (op*(i-buffer_data_start));
 			int past_output = (mask & output) >> (op*(i-buffer_data_start));
-			unpacked_output[i-buffer_data_start] = sum + past_output;
+			unpacked_output[i-buffer_data_start] = trunc(trunc(sum,op) + past_output,op);
+			// truncate sum, truncate (truncated sum + past_output)
 		}
 
 		// truncate output
-		for (unsigned i = 0; i < 32/op; i++) {
+		/*for (unsigned i = 0; i < 32/op; i++) {
 			int mask = 1, latest_one = -1;
 			unsigned data = unpacked_output[i];
 			for (unsigned j = 0; j < sizeof(unsigned)*8; j++) {
@@ -1555,7 +1577,7 @@ void bsmad_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 				if (shifted_output == (pow(2,op)-1)) round_up = 0;
 				unpacked_output[i] = shifted_output + round_up;
 			}
-		}
+		}*/
 
 		// pack the outputs into one register
 		unsigned mask = pow(2,op)-1;
diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def
index 021eed8..b363dca 100644
--- a/src/cuda-sim/opcodes.def
+++ b/src/cuda-sim/opcodes.def
@@ -52,7 +52,7 @@ OP_DEF(BRA_OP,bra_impl,"bra",0,3)
 OP_DEF(BRX_OP,brx_impl,"brx",0,3)
 OP_DEF(BREV_OP,brev_impl,"brev",1,1)
 OP_DEF(BRKPT_OP,brkpt_impl,"brkpt",1,9)
-OP_W_DEF(BSMAD_OP,bsmad_impl,"bsmad",0,1)
+OP_W_DEF(BSMAD_OP,bsmad_impl,"bsmad",1,1)
 OP_DEF(CALL_OP,call_impl,"call",1,3)
 OP_DEF(CALLP_OP,callp_impl,"callp",1,3)
 OP_DEF(CLZ_OP,clz_impl,"clz",1,1)