diff options
| author | Ahmed El-Shafiey <[email protected]> | 2013-04-15 12:19:36 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:50:46 -0700 |
| commit | 5921d9d73d32e2eec38a4b154c4c71759ffb8a5f (patch) | |
| tree | 09716a218ebe0ffa1910f94c8c2811ce69dc7f3b | |
| parent | 77cdf0905eea68880c7ef15b041e7ebfad301c2f (diff) | |
make sure L1 cache is flushed at a configuration change between kernels, even if flushing L1 cache between kernels option is not set
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834]
| -rw-r--r-- | src/abstract_hardware_model.h | 9 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.cc | 2 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.h | 6 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 17 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.h | 7 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.h | 8 |
6 files changed, 30 insertions, 19 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 5d74651..d1acff6 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -47,6 +47,15 @@ enum _memory_space_t { instruction_space }; + +enum FuncCache +{ + FuncCachePreferNone = 0, + FuncCachePreferShared = 1, + FuncCachePreferL1 = 2 +}; + + #ifdef __cplusplus #include <string.h> diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 3d8d911..28fcd5c 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -48,7 +48,7 @@ const char * cache_request_status_str(enum cache_request_status status) } void l2_cache_config::init(linear_to_raw_address_translation *address_mapping){ - cache_config::init(m_config_string); + cache_config::init(m_config_string,FuncCachePreferNone); m_address_mapping = address_mapping; } diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index dd56d9f..59e56bc 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -134,8 +134,9 @@ public: m_config_stringPrefL1 = NULL; m_config_stringPrefShared = NULL; } - void init(char * config) + void init(char * config, FuncCache status) { + cache_status= status; assert( config ); char rp, wp, ap, mshr_type, wap; @@ -235,10 +236,11 @@ public: { return addr & ~(m_line_sz-1); } - + FuncCache get_cache_status() {return cache_status;} char *m_config_string; char *m_config_stringPrefL1; char *m_config_stringPrefShared; + FuncCache cache_status; protected: void exit_parse_error() diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 2778077..39216f9 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -811,20 +811,27 @@ void gpgpu_sim::set_cache_config(std::string kernel_name) void gpgpu_sim::change_cache_config(FuncCache cache_config) { + if(cache_config != m_shader_config->m_L1D_config.get_cache_status()){ + printf("FLUSH L1 Cache at configuration change between kernels\n"); + for (unsigned i=0;i<m_shader_config->n_simt_clusters;i++) { + m_cluster[i]->cache_flush(); + } + } + switch(cache_config){ case FuncCachePreferNone: - m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string); + m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string, FuncCachePreferNone); m_shader_config->gpgpu_shmem_size=m_shader_config->gpgpu_shmem_sizeDefault; break; case FuncCachePreferL1: if((m_shader_config->m_L1D_config.m_config_stringPrefL1 == NULL) || (m_shader_config->gpgpu_shmem_sizePrefL1 == (unsigned)-1)) { printf("WARNING: missing Preferred L1 configuration\n"); - m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string); + m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string, FuncCachePreferNone); m_shader_config->gpgpu_shmem_size=m_shader_config->gpgpu_shmem_sizeDefault; }else{ - m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_stringPrefL1); + m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_stringPrefL1, FuncCachePreferL1); m_shader_config->gpgpu_shmem_size=m_shader_config->gpgpu_shmem_sizePrefL1; } break; @@ -832,10 +839,10 @@ void gpgpu_sim::change_cache_config(FuncCache cache_config) if((m_shader_config->m_L1D_config.m_config_stringPrefShared == NULL) || (m_shader_config->gpgpu_shmem_sizePrefShared == (unsigned)-1)) { printf("WARNING: missing Preferred L1 configuration\n"); - m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string); + m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_string, FuncCachePreferNone); m_shader_config->gpgpu_shmem_size=m_shader_config->gpgpu_shmem_sizeDefault; }else{ - m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_stringPrefShared); + m_shader_config->m_L1D_config.init(m_shader_config->m_L1D_config.m_config_stringPrefShared, FuncCachePreferShared); m_shader_config->gpgpu_shmem_size=m_shader_config->gpgpu_shmem_sizePrefShared; } break; diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 8616fd4..cadddac 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -71,13 +71,6 @@ enum dram_ctrl_t { DRAM_FRFCFS=1 }; -enum FuncCache -{ - FuncCachePreferNone = 0, - FuncCachePreferShared = 1, - FuncCachePreferL1 = 2 -}; - struct power_config { diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 4f5342f..f2d38a0 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1208,10 +1208,10 @@ struct shader_core_config : public core_config assert( !(n_thread_per_shader % warp_size) ); max_sfu_latency = 512; max_sp_latency = 32; - m_L1I_config.init(m_L1I_config.m_config_string); - m_L1T_config.init(m_L1T_config.m_config_string); - m_L1C_config.init(m_L1C_config.m_config_string); - m_L1D_config.init(m_L1D_config.m_config_string); + m_L1I_config.init(m_L1I_config.m_config_string,FuncCachePreferNone); + m_L1T_config.init(m_L1T_config.m_config_string,FuncCachePreferNone); + m_L1C_config.init(m_L1C_config.m_config_string,FuncCachePreferNone); + m_L1D_config.init(m_L1D_config.m_config_string,FuncCachePreferNone); gpgpu_cache_texl1_linesize = m_L1T_config.get_line_sz(); gpgpu_cache_constl1_linesize = m_L1C_config.get_line_sz(); m_valid = true; |
