A more accurate configuration for Fermi

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11514]

1 files changed, 12 insertions, 10 deletions

diff --git a/configs/Fermi/gpgpusim.config b/configs/Fermi/gpgpusim.config
index 313f443..6ee3e0a 100644
--- a/configs/Fermi/gpgpusim.config
+++ b/configs/Fermi/gpgpusim.config
@@ -4,27 +4,31 @@
 -gpgpu_ptx_force_max_capability 15
 
 # high level architecture configuration
--gpgpu_n_clusters 4
--gpgpu_n_cores_per_cluster 4
+-gpgpu_n_clusters 15
+-gpgpu_n_cores_per_cluster 1
 -gpgpu_n_mem 6
 
 # Fermi clock domains
--gpgpu_clock_domains 700.0:700.0:700.0:3696.0
+#-gpgpu_clock_domains <Core Clock>:<Interconnect Clock>:<L2 Clock>:<DRAM Clock>
+# In Fermi, each pipeline has 16 execution units, so the Core clock needs to be divided
+# by 2. (GPGPU-Sim simulates a warp (32 threads) in a single cycle). 1400/2 = 700
+-gpgpu_clock_domains 700.0:700.0:700.0:1848.0
 
 # shader core pipeline config
 -gpgpu_shader_registers 32768
 
+# This implies a maximum of 48 warps/SM
 -gpgpu_shader_core_pipeline 1536:32:32 
 -gpgpu_shader_cta 8
 -gpgpu_simd_model 1 
 
 
-# In Fermi, the cache and shared memory could be configured to 16kb:48kb(default) or 48kb:16kb
+# In Fermi, the cache and shared memory can be configured to 16kb:48kb(default) or 48kb:16kb
 # <nsets>:<bsize>:<assoc>:<rep>:<wr>:<alloc>,<mshr>:<N>:<merge>,<mq>
 -gpgpu_cache:dl1  32:128:4:L:R:f,A:32:8,8
 -gpgpu_shmem_size 49152
 
-# The alternative configuration for fermi in case more DL1 Cache is selected
+# The alternative configuration for fermi in case cudaFuncCachePreferL1 is selected
 #-gpgpu_cache:dl1  64:128:6:L:R:f,A:32:8,8
 #-gpgpu_shmem_size 16384
 
@@ -38,7 +42,7 @@
 
 -gpgpu_num_reg_banks 16
 
--gpgpu_shmem_warp_parts 2
+-gpgpu_shmem_warp_parts 1
 
 -gpgpu_max_insn_issue_per_warp 1
 
@@ -51,8 +55,8 @@
 -gpgpu_dram_sched_queue_size 16
 -gpgpu_n_mem_per_ctrlr 2
 
-# for Fermi, bus width is 384bits, this is 24 bytes *2 because of double data rate
--gpgpu_dram_buswidth 24 
+# for Fermi, bus width is 384bits, this is 8 bytes per memory partition
+-gpgpu_dram_buswidth 8
 -gpgpu_dram_burst_length 4
 -gpgpu_mem_address_mask 1
 -gpgpu_mem_addr_mapping dramid@8;00000000.00000000.00000000.00000000.0000RRRR.RRRRRRRR.RRBBBCCC.CCCSSSSS
@@ -67,8 +71,6 @@
 # Fermi has two schedulers per core
 -gpgpu_num_sched_per_core 2
 
-
-
 # stat collection
 -gpgpu_memlatency_stat 14 
 -gpgpu_runtime_stat 500