adaptive cache - update

3 files changed, 68 insertions, 40 deletions

diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index e796571..bd10a93 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -65,7 +65,7 @@ enum FuncCache {
   FuncCachePreferL1 = 2
 };
 
-enum AdaptiveCache { FIXED = 0, ADAPTIVE_VOLTA = 1 };
+enum AdaptiveCache { FIXED = 0, ADAPTIVE_CACHE = 1 };
 
 #ifdef __cplusplus
 
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index ccc935b..0162b6c 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -616,6 +616,8 @@ class cache_config {
     m_atom_sz = (m_cache_type == SECTOR) ? SECTOR_SIZE : m_line_sz;
     m_sector_sz_log2 = LOGB2(SECTOR_SIZE);
     original_m_assoc = m_assoc;
+    original_sz = m_nset * original_m_assoc * m_line_sz;
+
 
     // For more details about difference between FETCH_ON_WRITE and WRITE
     // VALIDAE policies Read: Jouppi, Norman P. "Cache write policies and
@@ -710,6 +712,14 @@ class cache_config {
     assert(m_valid);
     return MAX_DEFAULT_CACHE_SIZE_MULTIBLIER * original_m_assoc;
   }
+  unsigned get_original_assoc() const {
+    assert(m_valid);
+    return original_m_assoc;
+  }
+  unsigned get_original_sz() const {
+    assert(m_valid);
+    return original_sz;
+  }
   void print(FILE *fp) const {
     fprintf(fp, "Size = %d B (%d Set x %d-way x %d byte line)\n",
             m_line_sz * m_nset * m_assoc, m_nset, m_assoc, m_line_sz);
@@ -777,6 +787,7 @@ class cache_config {
   unsigned m_atom_sz;
   unsigned m_sector_sz_log2;
   unsigned original_m_assoc;
+  unsigned original_sz;
   bool m_is_streaming;
 
   enum replacement_policy_t m_replacement_policy;  // 'L' = LRU, 'F' = FIFO
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 14d9044..b2adb4f 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -3292,50 +3292,67 @@ unsigned int shader_core_config::max_cta(const kernel_info_t &k) const {
   if (adaptive_cache_config && !k.cache_config_set) {
     // For more info about adaptive cache, see
     // https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
-    unsigned total_shmed = kernel_info->smem * result;
-    assert(total_shmed >= 0 && total_shmed <= gpgpu_shmem_size);
-    // assert(gpgpu_shmem_size == 98304); //Volta has 96 KB shared
-    // assert(m_L1D_config.get_nset() == 4);  //Volta L1 has four sets
-    if (total_shmed < gpgpu_shmem_size) {
-      switch (adaptive_cache_config) {
-        case FIXED:
-          break;
-        case ADAPTIVE_VOLTA: {
-          // For Volta, we assign the remaining shared memory to L1 cache
-          // For more info about adaptive cache, see
-          // https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
-          // assert(gpgpu_shmem_size == 98304); //Volta has 96 KB shared
-
-          // To Do: make it flexible and not tuned to 9KB share memory
-          unsigned max_assoc = m_L1D_config.get_max_assoc();
-          if (total_shmed == 0)
-            m_L1D_config.set_assoc(max_assoc);  // L1 is 128KB and shd=0
-          else if (total_shmed > 0 && total_shmed <= 8192)
-            m_L1D_config.set_assoc(0.9375 *
-                                   max_assoc);  // L1 is 120KB and shd=8KB
-          else if (total_shmed > 8192 && total_shmed <= 16384)
-            m_L1D_config.set_assoc(0.875 *
-                                   max_assoc);  // L1 is 112KB and shd=16KB
-          else if (total_shmed > 16384 && total_shmed <= 32768)
-            m_L1D_config.set_assoc(0.75 * max_assoc);  // L1 is 96KB and
-                                                       // shd=32KB
-          else if (total_shmed > 32768 && total_shmed <= 65536)
-            m_L1D_config.set_assoc(0.5 * max_assoc);  // L1 is 64KB and shd=64KB
-          else if (total_shmed > 65536 && total_shmed <= gpgpu_shmem_size)
-            m_L1D_config.set_assoc(0.25 * max_assoc);  // L1 is 32KB and
-                                                       // shd=96KB
-          else
-            assert(0);
-          break;
+    std::vector<unsigned> shmem_list;
+    for (unsigned i = 0; i < strlen(gpgpu_shmem_option); i++) {
+      char option[4];
+      int j = 0;
+      while (gpgpu_shmem_option[i] != ',' && i < strlen(gpgpu_shmem_option)) {
+        if (gpgpu_shmem_option[i] == ' ') {
+          // skip spaces
+          i++;
+        } else {
+          if (!isdigit(gpgpu_shmem_option[i])) {
+            // check for non digits, which should not be here
+            assert(0 && "invalid config: -gpgpu_shmem_option");
+          }
+          option[j] = gpgpu_shmem_option[i];
+          j++;
+          i++;
         }
-        default:
-          assert(0);
       }
+      // convert KB -> B
+      shmem_list.push_back((unsigned)atoi(option) * 1024);
+    }
+
+    unsigned total_shmem = kernel_info->smem * result;
+    unsigned total_unified = gpgpu_unified_l1d_size * 1024;
+    std::sort(shmem_list.begin(), shmem_list.end());
+
+    assert(total_shmem >= 0 && total_shmem <= shmem_list.back());
+    switch (adaptive_cache_config) {
+      case FIXED:
+        break;
+      case ADAPTIVE_CACHE: {
+        // For more info about adaptive cache, see
+        bool l1d_configured = false;
+        unsigned l1_defined = m_L1D_config.get_original_sz() / 1024;
+        unsigned max_assoc = m_L1D_config.get_original_assoc() * 
+          gpgpu_unified_l1d_size / l1_defined;
 
-      printf("GPGPU-Sim: Reconfigure L1 cache to %uKB\n",
-             m_L1D_config.get_total_size_inKB());
+        if (total_shmem == 0) {
+          m_L1D_config.set_assoc(max_assoc);
+          l1d_configured = true;
+        } else {
+          for (std::vector<unsigned>::iterator it = shmem_list.begin();
+               it < shmem_list.end() - 1; it++) {
+            if (total_shmem > *it && total_shmem <= *(it + 1)) {
+              float l1_ratio = 1 - (float) *(it + 1) / total_unified;
+              m_L1D_config.set_assoc(max_assoc * l1_ratio);
+              l1d_configured = true;
+              break;
+            }
+          }
+        }
+        assert(l1d_configured && "no shared memory option found");
+        break;
+      }
+      default:
+        assert(0);
     }
 
+    printf("GPGPU-Sim: Reconfigure L1 cache to %uKB\n",
+           m_L1D_config.get_total_size_inKB());
+
     k.cache_config_set = true;
   }