Merge pull request #25 from echoedit/dev

Dev

40 files changed, 447 insertions, 418 deletions

diff --git a/libcuda/cuda_api_object.h b/libcuda/cuda_api_object.h
index db5e6a4..51416f2 100644
--- a/libcuda/cuda_api_object.h
+++ b/libcuda/cuda_api_object.h
@@ -199,6 +199,7 @@ class cuda_runtime_api {
 	std::list<cuobjdumpSection*> mergeSections();
 	cuobjdumpELFSection* findELFSection(const std::string identifier);
 	cuobjdumpPTXSection* findPTXSection(const std::string identifier);
+	cuobjdumpPTXSection* findPTXSectionInList(std::list<cuobjdumpSection*> &sectionlist, const std::string identifier);
 	void cuobjdumpRegisterFatBinary(unsigned int handle, const char* filename, CUctx_st *context);
 	kernel_info_t *gpgpu_cuda_ptx_sim_init_grid( const char *kernel_key,
 		gpgpu_ptx_sim_arg_list_t args,
diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc
index 59d2a60..10a651a 100644
--- a/libcuda/cuda_runtime_api.cc
+++ b/libcuda/cuda_runtime_api.cc
@@ -2421,7 +2421,6 @@ __host__ cudaError_t CUDARTAPI cudaGetExportTable(const void **ppExportTable, co
 
 //extracts all ptx files from binary and dumps into prog_name.unique_no.sm_<>.ptx files
 void cuda_runtime_api::extract_ptx_files_using_cuobjdump(CUctx_st *context){
-    extern bool g_cdp_enabled;
     char command[1000];
     char *pytorch_bin = getenv("PYTORCH_BIN");
     std::string app_binary = get_app_binary(); 
@@ -2442,7 +2441,7 @@ void cuda_runtime_api::extract_ptx_files_using_cuobjdump(CUctx_st *context){
         printf("WARNING: Failed to execute cuobjdump to get list of ptx files \n");
         exit(0);
     }   
-    if(!g_cdp_enabled) {
+    if(!gpgpu_ctx->device_runtime->g_cdp_enabled) {
         //based on the list above, dump ptx files individually. Format of dumped ptx file is prog_name.unique_no.sm_<>.ptx
 
        std::ifstream infile(ptx_list_file_name);
@@ -2515,7 +2514,6 @@ void cuda_runtime_api::extract_code_using_cuobjdump(){
     }
     // Running cuobjdump using dynamic link to current process
     // Needs the option '-all' to extract PTX from CDP-enabled binary 
-    extern bool g_cdp_enabled;
 
     //dump ptx for all individial ptx files into sepearte files which is later used by ptxas.
     int result=0;
@@ -2530,7 +2528,7 @@ void cuda_runtime_api::extract_code_using_cuobjdump(){
 	snprintf(fname,1024,"_cuobjdump_complete_output_XXXXXX");
 	int fd=mkstemp(fname);
 	close(fd);
-	if(!g_cdp_enabled)
+	if(!gpgpu_ctx->device_runtime->g_cdp_enabled)
             snprintf(command,1000,"$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass %s > %s", app_binary.c_str(), fname);
 	else
             snprintf(command,1000,"$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass -all %s > %s", app_binary.c_str(), fname);
@@ -2822,7 +2820,7 @@ cuobjdumpELFSection* cuda_runtime_api::findELFSection(const std::string identifi
 }
 
 //! Within the section list, find the PTX section corresponding to a given identifier
-cuobjdumpPTXSection* findPTXSectionInList(std::list<cuobjdumpSection*> &sectionlist, const std::string identifier){
+cuobjdumpPTXSection* cuda_runtime_api::findPTXSectionInList(std::list<cuobjdumpSection*> &sectionlist, const std::string identifier){
 	std::list<cuobjdumpSection*>::iterator iter;
 	for (	iter = sectionlist.begin();
 			iter != sectionlist.end();
@@ -2833,8 +2831,7 @@ cuobjdumpPTXSection* findPTXSectionInList(std::list<cuobjdumpSection*> &sectionl
 			if(ptxsection->getIdentifier() == identifier)
 				return ptxsection;
 			else {
-				extern bool g_cdp_enabled;
-				if(g_cdp_enabled) {
+				if(gpgpu_ctx->device_runtime->g_cdp_enabled) {
 					printf("Warning: __cudaRegisterFatBinary needs %s, but find PTX section with %s\n",
 						identifier.c_str(), ptxsection->getIdentifier().c_str());
 					return ptxsection;
diff --git a/libcuda/gpgpu_context.h b/libcuda/gpgpu_context.h
index 3c9f87c..45c5cdd 100644
--- a/libcuda/gpgpu_context.h
+++ b/libcuda/gpgpu_context.h
@@ -6,32 +6,51 @@
 #include "../src/gpgpusim_entrypoint.h"
 #include "../src/cuda-sim/cuda-sim.h"
 #include "../src/cuda-sim/cuda_device_runtime.h"
+#include "../src/cuda-sim/ptx-stats.h"
 
 class gpgpu_context {
     public:
 	gpgpu_context() {
 	    g_global_allfiles_symbol_table = NULL;
+	    sm_next_access_uid=0;
+	    warp_inst_sm_next_uid=0;
+	    operand_info_sm_next_uid = 1;
+	    kernel_info_m_next_uid = 1;
+	    g_num_ptx_inst_uid = 0;
+	    g_ptx_cta_info_uid = 1;
+	    symbol_sm_next_uid = 1;
+	    function_info_sm_next_uid = 1;
+	    debug_tensorcore = 0;
 	    api = new cuda_runtime_api(this);
 	    ptxinfo = new ptxinfo_data(this);
 	    ptx_parser = new ptx_recognizer(this);
 	    the_gpgpusim = new GPGPUsim_ctx(this);
 	    func_sim = new cuda_sim(this);
-#if (CUDART_VERSION >= 5000)
 	    device_runtime = new cuda_device_runtime(this);
-#endif
+	    stats = new ptx_stats(this);
 	}
 	// global list
 	symbol_table *g_global_allfiles_symbol_table;
 	const char *g_filename;
+	unsigned sm_next_access_uid;
+	unsigned warp_inst_sm_next_uid;
+	unsigned operand_info_sm_next_uid;//uid for operand_info
+	unsigned kernel_info_m_next_uid;//uid for kernel_info_t
+	unsigned g_num_ptx_inst_uid; //uid for ptx inst inside ptx_instruction
+	unsigned long long g_ptx_cta_info_uid;
+	unsigned symbol_sm_next_uid; //uid for symbol
+	unsigned function_info_sm_next_uid;
+	std::vector<ptx_instruction*> s_g_pc_to_insn; // a direct mapping from PC to instruction
+	bool debug_tensorcore;
+
 	// objects pointers for each file
 	cuda_runtime_api* api;
 	ptxinfo_data* ptxinfo;
 	ptx_recognizer* ptx_parser;
 	GPGPUsim_ctx* the_gpgpusim;
 	cuda_sim* func_sim;
-#if (CUDART_VERSION >= 5000)
 	cuda_device_runtime* device_runtime;
-#endif
+	ptx_stats* stats;
 	// member function list
 	void cuobjdumpParseBinary(unsigned int handle);
 	class symbol_table *gpgpu_ptx_sim_load_ptx_from_string( const char *p, unsigned source_num );
@@ -43,6 +62,9 @@ class gpgpu_context {
 	class gpgpu_sim *gpgpu_ptx_sim_init_perf();
 	struct _cuda_device_id *GPGPUSim_Init();
 	void ptx_reg_options(option_parser_t opp);
+	const ptx_instruction* pc_to_instruction(unsigned pc); 
+	const warp_inst_t *ptx_fetch_inst( address_type pc );
+	unsigned translate_pc_to_ptxlineno(unsigned pc);
 };
 gpgpu_context* GPGPU_Context();
 
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc
index ef09051..d8d5fbd 100644
--- a/src/abstract_hardware_model.cc
+++ b/src/abstract_hardware_model.cc
@@ -41,8 +41,26 @@
 #include <iostream>
 #include "../libcuda/gpgpu_context.h"
 
-unsigned mem_access_t::sm_next_access_uid = 0;   
-unsigned warp_inst_t::sm_next_uid = 0;
+void mem_access_t::init(gpgpu_context* ctx)
+{
+      gpgpu_ctx = ctx;
+      m_uid=++(gpgpu_ctx->sm_next_access_uid);
+      m_addr=0;
+      m_req_size=0;
+}
+void warp_inst_t::issue( const active_mask_t &mask, unsigned warp_id, unsigned long long cycle, int dynamic_warp_id, int sch_id )
+{
+    m_warp_active_mask = mask;
+    m_warp_issued_mask = mask; 
+    m_uid = ++(m_config->gpgpu_ctx->warp_inst_sm_next_uid);
+    m_warp_id = warp_id;
+    m_dynamic_warp_id = dynamic_warp_id;
+    issue_cycle = cycle;
+    cycles = initiation_interval;
+    m_cache_hit=false;
+    m_empty=false;
+    m_scheduler_id=sch_id;
+}
 
 checkpoint::checkpoint()
 {
@@ -408,7 +426,7 @@ void warp_inst_t::generate_mem_accesses()
         }
         assert( total_accesses > 0 && total_accesses <= m_config->warp_size );
         cycles = total_accesses; // shared memory conflicts modeled as larger initiation interval 
-        ptx_file_line_stats_add_smem_bank_conflict( pc, total_accesses );
+        m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_smem_bank_conflict( pc, total_accesses );
         break;
     }
 
@@ -449,11 +467,11 @@ void warp_inst_t::generate_mem_accesses()
                 byte_mask.set(idx+i);
         }
         for( a=accesses.begin(); a != accesses.end(); ++a ) 
-            m_accessq.push_back( mem_access_t(access_type,a->first,cache_block_size,is_write,a->second, byte_mask, mem_access_sector_mask_t()));
+            m_accessq.push_back( mem_access_t(access_type,a->first,cache_block_size,is_write,a->second, byte_mask, mem_access_sector_mask_t(), m_config->gpgpu_ctx));
     }
 
     if ( space.get_type() == global_space ) {
-        ptx_file_line_stats_add_uncoalesced_gmem( pc, m_accessq.size() - starting_queue_size );
+        m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_uncoalesced_gmem( pc, m_accessq.size() - starting_queue_size );
     }
     m_mem_accesses_created=true;
 }
@@ -681,21 +699,16 @@ void warp_inst_t::memory_coalescing_arch_reduce_and_send( bool is_write, mem_acc
            assert(lower_half_used && upper_half_used);
        }
    }
-   m_accessq.push_back( mem_access_t(access_type,addr,size,is_write,info.active,info.bytes, info.chunks) );
+   m_accessq.push_back( mem_access_t(access_type,addr,size,is_write,info.active,info.bytes, info.chunks,m_config->gpgpu_ctx) );
 }
 
 void warp_inst_t::completed( unsigned long long cycle ) const 
 {
    unsigned long long latency = cycle - issue_cycle; 
    assert(latency <= cycle); // underflow detection 
-   ptx_file_line_stats_add_latency(pc, latency * active_count());  
+   m_config->gpgpu_ctx->stats->ptx_file_line_stats_add_latency(pc, latency * active_count());  
 }
 
-//Jin: CDP support
-bool g_cdp_enabled;
-unsigned g_kernel_launch_latency;
-
-unsigned kernel_info_t::m_next_uid = 1;
 
 /*A snapshot of the texture mappings needs to be stored in the kernel's info as 
 kernels should use the texture bindings seen at the time of launch and textures
@@ -710,14 +723,14 @@ kernel_info_t::kernel_info_t( dim3 gridDim, dim3 blockDim, class function_info *
     m_next_cta.z=0;
     m_next_tid=m_next_cta;
     m_num_cores_running=0;
-    m_uid = m_next_uid++;
+    m_uid = (entry->gpgpu_ctx->kernel_info_m_next_uid)++;
     m_param_mem = new memory_space_impl<8192>("param",64*1024);
 
     //Jin: parent and child kernel management for CDP
     m_parent_kernel = NULL;
    
     //Jin: launch latency management
-    m_launch_latency = g_kernel_launch_latency;
+    m_launch_latency = entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency;
 
     volta_cache_config_set=false;
     m_NameToCudaArray = nameToCudaArray;
@@ -771,8 +784,7 @@ bool kernel_info_t::children_all_finished() {
 
 void kernel_info_t::notify_parent_finished() {
    if(m_parent_kernel) {
-       extern unsigned long long g_total_param_size;
-       g_total_param_size -= ((m_kernel_entry->get_args_aligned_size() + 255)/256*256);
+       m_kernel_entry->gpgpu_ctx->device_runtime->g_total_param_size -= ((m_kernel_entry->get_args_aligned_size() + 255)/256*256);
        m_parent_kernel->remove_child(this);
        g_stream_manager()->register_finished_kernel(m_parent_kernel->get_uid());
    }
@@ -1098,7 +1110,7 @@ void simt_stack::update( simt_mask_t &thread_done, addr_vector_t &next_pc, addre
 
 
     if (warp_diverged) {
-        ptx_file_line_stats_add_warp_divergence(top_pc, 1); 
+        m_gpu->gpgpu_ctx->stats->ptx_file_line_stats_add_warp_divergence(top_pc, 1); 
     }
 }
 
@@ -1145,7 +1157,7 @@ warp_inst_t core_t::getExecuteWarp(unsigned warpId)
 {
     unsigned pc,rpc;
     m_simt_stack[warpId]->get_pdom_stack_top_info(&pc,&rpc);
-    warp_inst_t wi= *ptx_fetch_inst(pc);
+    warp_inst_t wi= *(m_gpu->gpgpu_ctx->ptx_fetch_inst(pc));
     wi.set_active(m_simt_stack[warpId]->get_active_mask());
     return wi;
 }
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 8ef8376..d13b8c6 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -299,7 +299,6 @@ private:
    class function_info *m_kernel_entry;
 
    unsigned m_uid;
-   static unsigned m_next_uid;
    
    //These maps contain the snapshot of the texture mappings at kernel launch
    std::map<std::string, const struct cudaArray*> m_NameToCudaArray;
@@ -732,13 +731,14 @@ enum cache_operator_type {
 
 class mem_access_t {
 public:
-   mem_access_t() { init(); }
+   mem_access_t(gpgpu_context* ctx) { init(ctx); }
    mem_access_t( mem_access_type type, 
                  new_addr_type address, 
                  unsigned size,
-                 bool wr )
+                 bool wr,
+		 gpgpu_context* ctx)
    {
-       init();
+       init(ctx);
        m_type = type;
        m_addr = address;
        m_req_size = size;
@@ -750,10 +750,11 @@ public:
                  bool wr, 
                  const active_mask_t &active_mask,
                  const mem_access_byte_mask_t &byte_mask,
-		 const mem_access_sector_mask_t &sector_mask)
+		 const mem_access_sector_mask_t &sector_mask,
+		 gpgpu_context* ctx)
     : m_warp_mask(active_mask), m_byte_mask(byte_mask), m_sector_mask(sector_mask)
    {
-      init();
+      init(ctx);
       m_type = type;
       m_addr = address;
       m_req_size = size;
@@ -786,13 +787,9 @@ public:
        }
    }
 
+   gpgpu_context* gpgpu_ctx;
 private:
-   void init() 
-   {
-      m_uid=++sm_next_access_uid;
-      m_addr=0;
-      m_req_size=0;
-   }
+   void init(gpgpu_context* ctx);
 
    unsigned      m_uid;
    new_addr_type m_addr;     // request address
@@ -802,8 +799,6 @@ private:
    active_mask_t m_warp_mask;
    mem_access_byte_mask_t m_byte_mask;
    mem_access_sector_mask_t m_sector_mask;
-
-   static unsigned sm_next_access_uid;
 };
 
 class mem_fetch;
@@ -962,19 +957,9 @@ public:
     { 
         m_empty=true; 
     }
-    void issue( const active_mask_t &mask, unsigned warp_id, unsigned long long cycle, int dynamic_warp_id, int sch_id )
-    {
-        m_warp_active_mask = mask;
-        m_warp_issued_mask = mask; 
-        m_uid = ++sm_next_uid;
-        m_warp_id = warp_id;
-        m_dynamic_warp_id = dynamic_warp_id;
-        issue_cycle = cycle;
-        cycles = initiation_interval;
-        m_cache_hit=false;
-        m_empty=false;
-        m_scheduler_id=sch_id;
-    }
+
+    void issue( const active_mask_t &mask, unsigned warp_id, unsigned long long cycle, int dynamic_warp_id, int sch_id );
+
     const active_mask_t & get_active_mask() const
     {
     	return m_warp_active_mask;
@@ -1137,8 +1122,6 @@ protected:
     bool m_mem_accesses_created;
     std::list<mem_access_t> m_accessq;
 
-    static unsigned sm_next_uid;
-
     unsigned m_scheduler_id;  //the scheduler that issues this inst
 
     //Jin: cdp support
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 7ff869c..b9e6552 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -54,7 +54,6 @@ typedef void * yyscan_t;
 #include "../../libcuda/gpgpu_context.h"
 
 int g_debug_execution = 0;
-addr_t g_debug_pc = 0xBEEF1518;
 // Output debug information to file options
 
 
@@ -216,8 +215,6 @@ void gpgpu_t::gpgpu_ptx_sim_unbindTexture(const struct textureReference* texref)
    m_NameToTextureInfo.erase(texname);
 }
 
-std::vector<ptx_instruction*> function_info::s_g_pc_to_insn;
-
 #define MAX_INST_SIZE 8 /*bytes*/
 
 void function_info::ptx_assemble()
@@ -238,14 +235,14 @@ void function_info::ptx_assemble()
    addr_t PC = gpgpu_ctx->func_sim->g_assemble_code_next_pc; // globally unique address (across functions)
    // start function on an aligned address
    for( unsigned i=0; i < (PC%MAX_INST_SIZE); i++ ) 
-      s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
+      gpgpu_ctx->s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
    PC += PC%MAX_INST_SIZE; 
    m_start_PC = PC;
 
    addr_t n=0; // offset in m_instr_mem
    //Why s_g_pc_to_insn.size() is needed to reserve additional memory for insts? reserve is cumulative.
    //s_g_pc_to_insn.reserve(s_g_pc_to_insn.size() + MAX_INST_SIZE*m_instructions.size());
-   s_g_pc_to_insn.reserve(MAX_INST_SIZE*m_instructions.size());
+   gpgpu_ctx->s_g_pc_to_insn.reserve(MAX_INST_SIZE*m_instructions.size());
    for ( i=m_instructions.begin(); i != m_instructions.end(); i++ ) {
       ptx_instruction *pI = *i;
       if ( pI->is_label() ) {
@@ -254,13 +251,13 @@ void function_info::ptx_assemble()
       } else {
          gpgpu_ctx->func_sim->g_pc_to_finfo[PC] = this;
          m_instr_mem[n] = pI;
-         s_g_pc_to_insn.push_back(pI);
-         assert(pI == s_g_pc_to_insn[PC]);
+         gpgpu_ctx->s_g_pc_to_insn.push_back(pI);
+         assert(pI == gpgpu_ctx->s_g_pc_to_insn[PC]);
          pI->set_m_instr_mem_index(n);
          pI->set_PC(PC);
          assert( pI->inst_size() <= MAX_INST_SIZE );
          for( unsigned i=1; i < pI->inst_size(); i++ ) {
-            s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
+            gpgpu_ctx->s_g_pc_to_insn.push_back((ptx_instruction*)NULL);
             m_instr_mem[n+i]=NULL;
          }
          n  += pI->inst_size();
@@ -1739,9 +1736,9 @@ const struct gpgpu_ptx_sim_info* ptx_sim_kernel_info(const function_info *kernel
    return kernel->get_kernel_info();
 }
 
-const warp_inst_t *ptx_fetch_inst( address_type pc )
+const warp_inst_t *gpgpu_context::ptx_fetch_inst( address_type pc )
 {
-    return function_info::pc_to_instruction(pc);
+    return pc_to_instruction(pc);
 }
 
 unsigned ptx_sim_init_thread( kernel_info_t &kernel,
@@ -1825,7 +1822,7 @@ unsigned ptx_sim_init_thread( kernel_info_t &kernel,
       snprintf(buf,512,"sstarr_%u", sid);
       sstarr_mem = new memory_space_impl<16*1024>(buf,4);
       sstarr_memory_lookup[sm_idx] = sstarr_mem;
-      cta_info = new ptx_cta_info(sm_idx);
+      cta_info = new ptx_cta_info(sm_idx, gpu->gpgpu_ctx);
       ptx_cta_lookup[sm_idx] = cta_info;
    } else {
       if ( g_debug_execution >= 1 ) {
@@ -1995,8 +1992,8 @@ void cuda_sim::gpgpu_ptx_sim_memcpy_symbol(const char *hostVar, const void *src,
    const char *mem_name = NULL;
    memory_space *mem = NULL;
 
-   std::map<std::string,symbol_table*>::iterator st = g_sym_name_to_symbol_table.find(sym_name.c_str());
-   assert( st != g_sym_name_to_symbol_table.end() );
+   std::map<std::string,symbol_table*>::iterator st = gpgpu_ctx->ptx_parser->g_sym_name_to_symbol_table.find(sym_name.c_str());
+   assert( st != gpgpu_ctx->ptx_parser->g_sym_name_to_symbol_table.end() );
    symbol_table *symtab = st->second;
 
    symbol *sym = symtab->lookup(sym_name.c_str());
@@ -2367,11 +2364,11 @@ void functionalCoreSim::executeWarp(unsigned i, bool &allAtBarrier, bool & someO
     if(!m_warpAtBarrier[i]&& m_liveThreadCount[i]>0) allAtBarrier = false;
 }
 
-unsigned translate_pc_to_ptxlineno(unsigned pc)
+unsigned gpgpu_context::translate_pc_to_ptxlineno(unsigned pc)
 {
    // this function assumes that the kernel fits inside a single PTX file
    // function_info *pFunc = g_func_info; // assume that the current kernel is the one in query
-   const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+   const ptx_instruction *pInsn = pc_to_instruction(pc);
    unsigned ptx_line_number = pInsn->source_line();
 
    return ptx_line_number;
diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h
index e4d34fe..1be3d19 100644
--- a/src/cuda-sim/cuda-sim.h
+++ b/src/cuda-sim/cuda-sim.h
@@ -58,10 +58,8 @@ unsigned ptx_sim_init_thread( kernel_info_t &kernel,
                               unsigned hw_warp_id,
                               gpgpu_t *gpu,
                               bool functionalSimulationMode = false);
-const warp_inst_t *ptx_fetch_inst( address_type pc );
 const struct gpgpu_ptx_sim_info* ptx_sim_kernel_info(const class function_info *kernel);
 
-
 /*!
  * This class functionally executes a kernel. It uses the basic data structures and procedures in core_t 
  */
@@ -132,6 +130,11 @@ class cuda_sim {
 	    g_inst_op_classification_stat= NULL;
 	    g_assemble_code_next_pc=0;
 	    g_debug_thread_uid = 0;
+	    g_override_embedded_ptx = false;
+	    ptx_tex_regs = NULL;
+	    g_ptx_thread_info_delete_count=0;
+	    g_ptx_thread_info_uid_next=1;
+	    g_debug_pc = 0xBEEF1518;
 	    gpgpu_ctx = ctx;
 	}
 	//global variables
@@ -166,6 +169,12 @@ class cuda_sim {
 	unsigned cdp_latency[5];
 	unsigned g_assemble_code_next_pc;
 	int g_debug_thread_uid;
+	bool g_override_embedded_ptx;
+	std::set<unsigned long long> g_ptx_cta_info_sm_idx_used;
+	ptx_reg_t* ptx_tex_regs;
+	unsigned g_ptx_thread_info_delete_count;
+	unsigned g_ptx_thread_info_uid_next;
+	addr_t g_debug_pc;
 	// backward pointer
 	class gpgpu_context* gpgpu_ctx;
 	//global functions
diff --git a/src/cuda-sim/cuda_device_runtime.cc b/src/cuda-sim/cuda_device_runtime.cc
index 354fa79..dc3adc3 100644
--- a/src/cuda-sim/cuda_device_runtime.cc
+++ b/src/cuda-sim/cuda_device_runtime.cc
@@ -5,8 +5,6 @@
 #include <iostream>
 #include <map>
 
-unsigned long long g_total_param_size = 0;
-unsigned long long g_max_total_param_size = 0;
 
 
 #if (CUDART_VERSION >= 5000)
@@ -28,49 +26,12 @@ unsigned long long g_max_total_param_size = 0;
       std::cout.flush(); \
    }
 
-class device_launch_config_t {
 
-public:
-    device_launch_config_t() {}
-
-    device_launch_config_t(dim3 _grid_dim,
-        dim3 _block_dim,
-        unsigned int _shared_mem,
-        function_info * _entry):
-            grid_dim(_grid_dim),
-            block_dim(_block_dim),
-            shared_mem(_shared_mem),
-            entry(_entry) {}
-    
-    dim3 grid_dim;
-    dim3 block_dim;
-    unsigned int shared_mem;
-    function_info * entry;
-
-};
-
-class device_launch_operation_t {
-
-public:
-    device_launch_operation_t() {}
-    device_launch_operation_t(kernel_info_t *_grid,
-        CUstream_st * _stream) :
-            grid(_grid), stream(_stream) {}
-
-    kernel_info_t * grid; //a new child grid
-
-    CUstream_st * stream; 
-
-};
-
-
-std::map<void *, device_launch_config_t> g_cuda_device_launch_param_map;
-std::list<device_launch_operation_t> g_cuda_device_launch_op;
 //extern stream_manager *g_stream_manager();
 
 //Handling device runtime api:
 //void * cudaGetParameterBufferV2(void *func, dim3 gridDimension, dim3 blockDimension, unsigned int sharedMemSize)
-void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func)
+void cuda_device_runtime::gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func)
 {
     DEV_RUNTIME_REPORT("Calling cudaGetParameterBufferV2");
       
@@ -143,7 +104,7 @@ void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_i
 
 //Handling device runtime api:
 //cudaError_t cudaLaunchDeviceV2(void *parameterBuffer, cudaStream_t stream)
-void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
+void cuda_device_runtime::gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
     DEV_RUNTIME_REPORT("Calling cudaLaunchDeviceV2");
 
     unsigned n_return = target_func->has_return();
@@ -264,7 +225,7 @@ void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info *
 //Handling device runtime api:
 //cudaError_t cudaStreamCreateWithFlags ( cudaStream_t* pStream, unsigned int  flags)
 //flags can only be cudaStreamNonBlocking
-void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
+void cuda_device_runtime::gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func) {
     DEV_RUNTIME_REPORT("Calling cudaStreamCreateWithFlags");
 
     unsigned n_return = target_func->has_return();
diff --git a/src/cuda-sim/cuda_device_runtime.h b/src/cuda-sim/cuda_device_runtime.h
index 851fed2..7f7a0ca 100644
--- a/src/cuda-sim/cuda_device_runtime.h
+++ b/src/cuda-sim/cuda_device_runtime.h
@@ -1,25 +1,68 @@
+#ifndef __cuda_device_runtime_h__
+#define __cuda_device_runtime_h__
 //Jin: cuda_device_runtime.h
 //Defines CUDA device runtime APIs for CDP support
-#if (CUDART_VERSION >= 5000)
-#pragma once
+class device_launch_config_t {
 
-void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
-#endif
-#if (CUDART_VERSION >= 5000)
+public:
+    device_launch_config_t() {}
+
+    device_launch_config_t(dim3 _grid_dim,
+        dim3 _block_dim,
+        unsigned int _shared_mem,
+        function_info * _entry):
+            grid_dim(_grid_dim),
+            block_dim(_block_dim),
+            shared_mem(_shared_mem),
+            entry(_entry) {}
+
+    dim3 grid_dim;
+    dim3 block_dim;
+    unsigned int shared_mem;
+    function_info * entry;
+
+};
+
+class device_launch_operation_t {
+
+public:
+    device_launch_operation_t() {}
+    device_launch_operation_t(kernel_info_t *_grid,
+        CUstream_st * _stream) :
+            grid(_grid), stream(_stream) {}
+
+    kernel_info_t * grid; //a new child grid
+
+    CUstream_st * stream;
+
+};
 
 class gpgpu_context;
 
 class cuda_device_runtime {
     public:
 	cuda_device_runtime( gpgpu_context* ctx ) {
+	    g_total_param_size = 0;
+	    g_max_total_param_size = 0;
 	    gpgpu_ctx = ctx;
 	}
+	unsigned long long g_total_param_size;
+	std::map<void *, device_launch_config_t> g_cuda_device_launch_param_map;
+	std::list<device_launch_operation_t> g_cuda_device_launch_op;
+	unsigned g_kernel_launch_latency;
+	unsigned long long g_max_total_param_size;
+	bool g_cdp_enabled;
+
 	// backward pointer
 	class gpgpu_context* gpgpu_ctx;
+#if (CUDART_VERSION >= 5000)
+#pragma once
+	void gpgpusim_cuda_launchDeviceV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
+	void gpgpusim_cuda_streamCreateWithFlags(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
+	void gpgpusim_cuda_getParameterBufferV2(const ptx_instruction * pI, ptx_thread_info * thread, const function_info * target_func);
 	void launch_all_device_kernels();
 	void launch_one_device_kernel();
+#endif
 };
 
-#endif
+#endif /* __cuda_device_runtime_h__  */
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 46a262d..58a077e 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -56,10 +56,10 @@ class ptx_recognizer;
 #include "cuda_device_runtime.h"
 
 #include <stdarg.h>
+#include "../../libcuda/gpgpu_context.h"
+
 using half_float::half;
 
-unsigned ptx_instruction::g_num_ptx_inst_uid=0;
-bool debug_tensorcore = 0;
 
 
 const char *g_opcode_string[NUM_OPCODES] = {
@@ -1839,14 +1839,14 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 	
 	for (thrd=0; thrd < core->get_warp_size(); thrd++){
 		thread = core->get_thread_info()[tid+thrd];
-		if(debug_tensorcore)
+		if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 			printf("THREAD=%d\n:",thrd);
 		for(int operand_num=1;operand_num<=3;operand_num++){
 			const operand_info &src_a=  pI->operand_lookup(operand_num);
          		unsigned nelem = src_a.get_vect_nelem();
          		ptx_reg_t v[8];
          		thread->get_vector_operand_values( src_a, v, nelem );
-			if(debug_tensorcore){
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 				printf("Thread%d_Iteration=%d\n:",thrd,operand_num);
 				for(k=0;k<nelem;k++){
 					printf("%x ",v[k].u64);
@@ -1868,14 +1868,14 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			if(!((operand_num==3)&&(type2==F32_TYPE))){
 				for(k=0;k<2*nelem;k++){
 					temp=nw_v[k].f16;
-					if(debug_tensorcore)
+					if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 						printf("%.2f ",temp);
 				}
-				if(debug_tensorcore)
+				if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 					printf("\n");
 			}
 			else{
-				if(debug_tensorcore){
+				if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 					for(k=0;k<8;k++){
 						printf("%.2f ",v[k].f32);
 					}
@@ -1886,7 +1886,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			      case 1 ://operand 1
 				for(k=0;k<8;k++){
 					mapping(thrd,LOAD_A,a_layout,F16_TYPE,k,16,row,col,offset);
-					if(debug_tensorcore)
+					if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 						printf("A:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
 				 	matrix_a[row][col]=nw_v[offset];
 			        }
@@ -1894,7 +1894,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			      case 2 ://operand 2
 				for(k=0;k<8;k++){
 					mapping(thrd,LOAD_B,b_layout,F16_TYPE,k,16,row,col,offset);
-					if(debug_tensorcore)
+					if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 						printf("B:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
 				 	matrix_b[row][col]=nw_v[offset];
 				}	
@@ -1902,7 +1902,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			      case 3 ://operand 3
 				for(k=0;k<8;k++){
 					mapping(thrd,LOAD_C,ROW,type2,k,16,row,col,offset);
-					if(debug_tensorcore)
+					if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 						printf("C:thread=%d,row=%d,col=%d,offset=%d\n",thrd,row,col,offset);
 					if(type2!=F16_TYPE){
 					 	matrix_c[row][col]=v[offset];
@@ -1916,10 +1916,10 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			         printf("Invalid Operand Index\n" );
 			}
 		}
-		if(debug_tensorcore)
+		if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 			printf("\n");
 	}
-	if(debug_tensorcore){
+	if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 		printf("MATRIX_A\n");
 		for (i=0;i<16;i++){
 			for(j=0;j<16;j++){
@@ -1979,7 +1979,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			}
 		}
 	}
-	if(debug_tensorcore){
+	if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 		printf("MATRIX_D\n");
 		for (i=0;i<16;i++){
 			for(j=0;j<16;j++){
@@ -1998,7 +1998,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 		int col_t[8];	
 		for(k=0;k<8;k++){
 			mapping(thrd,LOAD_C,ROW,type,k,16,row_t[k],col_t[k],offset);
-			if(debug_tensorcore)
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 				printf("mma:store:row:%d,col%d\n",row_t[k],col_t[k]);
 		}
 		thread = core->get_thread_info()[tid+thrd];
@@ -2007,7 +2007,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 		if(type==F32_TYPE){
 			thread->set_wmma_vector_operand_values(dst,matrix_d[row_t[0]][col_t[0]],matrix_d[row_t[1]][col_t[1]],matrix_d[row_t[2]][col_t[2]],matrix_d[row_t[3]][col_t[3]],matrix_d[row_t[4]][col_t[4]],matrix_d[row_t[5]][col_t[5]],matrix_d[row_t[6]][col_t[6]],matrix_d[row_t[7]][col_t[7]]);
 		
-			if(debug_tensorcore)
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 			{
 				printf("thread%d:",thrd);
 				for(k=0;k<8;k++){
@@ -2017,7 +2017,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			}
 		}
 		else if(type==F16_TYPE){
-			if(debug_tensorcore){	
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){	
 				printf("thread%d:",thrd);
 				for(k=0;k<8;k++){
 					temp=matrix_d[row_t[k]][col_t[k]].f16;
@@ -2037,7 +2037,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
 			nw_data3.s64=((matrix_d[row_t[4]][col_t[4]].s64   & 0xffff))|((matrix_d[row_t[5]][col_t[5]].s64&0xffff)<<16);
 			nw_data4.s64=((matrix_d[row_t[6]][col_t[6]].s64   & 0xffff))|((matrix_d[row_t[7]][col_t[7]].s64&0xffff)<<16);
    			thread->set_vector_operand_values(dst,nw_data1,nw_data2,nw_data3,nw_data4);
-			if(debug_tensorcore)
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 		 		printf("thread%d=%x,%x,%x,%x",thrd,nw_data1.s64,nw_data2.s64,nw_data3.s64,nw_data4.s64);
 		
 		}
@@ -2095,15 +2095,15 @@ void call_impl( const ptx_instruction *pI, ptx_thread_info *thread )
 #if (CUDART_VERSION >= 5000)
    //Jin: handle device runtime apis for CDP
    else if(fname == "cudaGetParameterBufferV2") {
-      gpgpusim_cuda_getParameterBufferV2(pI, thread, target_func);
+      target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_getParameterBufferV2(pI, thread, target_func);
 	  return;
    }
    else if(fname == "cudaLaunchDeviceV2") {
-      gpgpusim_cuda_launchDeviceV2(pI, thread, target_func);
+      target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_launchDeviceV2(pI, thread, target_func);
 	  return;
    }
    else if(fname == "cudaStreamCreateWithFlags") {
-      gpgpusim_cuda_streamCreateWithFlags(pI, thread, target_func);
+      target_func->gpgpu_ctx->device_runtime->gpgpusim_cuda_streamCreateWithFlags(pI, thread, target_func);
 	  return;
    }
 #endif
@@ -3131,7 +3131,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
    	decode_space(space,thread,src1,mem,addr);
 
    	type_info_key::type_decode(type,size,t);
-   	if(debug_tensorcore)
+   	if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 		printf("mma_st: thrd=%d,addr=%x, fp(size=%d), stride=%d\n",thrd,addr_reg.u32,size,src2_data.u32);
 	addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;  
 	addr_t push_addr;
@@ -3151,7 +3151,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
        			mem->write(push_addr,size/8,&v[k].s64,thread,pI);
 			mem_txn_addr[num_mem_txn++]=push_addr;
 	
-			if(debug_tensorcore){
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 				printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,v[0].s64,v[1].s64,v[2].s64,v[3].s64,v[4].s64,v[5].s64,v[6].s64,v[7].s64);   
 				float temp;
 				int l;
@@ -3178,7 +3178,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
 				mem_txn_addr[num_mem_txn++]=push_addr;
 			}
 	
-			if(debug_tensorcore)
+			if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
 				printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,nw_v[0].s64,nw_v[1].s64,nw_v[2].s64,nw_v[3].s64,nw_v[4].s64,nw_v[5].s64,nw_v[6].s64,nw_v[7].s64);   
 		}
 	}
@@ -3241,7 +3241,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
    	type_info_key::type_decode(type,size,t);
 	
 	ptx_reg_t data[16];
-   	if(debug_tensorcore)	
+   	if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)	
 		printf("mma_ld: thrd=%d,addr=%x, fpsize=%d, stride=%d\n",thrd,src1_data.u32,size,src2_data.u32);
 	
 	addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;  
@@ -3337,7 +3337,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
    		inst.data_size = 4; // 4 byte transaction 
    	assert( inst.memory_op == insn_memory_op );
 
-	if(debug_tensorcore){
+	if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
 		if(type==F16_TYPE){
 			printf("\nmma_ld:thread%d= ",thrd);
 			for(i=0;i<16;i++){
@@ -3387,7 +3387,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
    			thread->set_vector_operand_values(dst,nw_data[0],nw_data[1],nw_data[2],nw_data[3]);
 		else
    			thread->set_wmma_vector_operand_values(dst,nw_data[0],nw_data[1],nw_data[2],nw_data[3],nw_data[4],nw_data[5],nw_data[6],nw_data[7]);
-		if(debug_tensorcore){	
+		if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){	
 			printf("mma_ld:data[0].s64=%x,data[1].s64=%x,new_data[0].s64=%x\n",data[0].u64,data[1].u64,nw_data[0].u64);	
 			printf("mma_ld:data[2].s64=%x,data[3].s64=%x,new_data[1].s64=%x\n",data[2].u64,data[3].u64,nw_data[1].u64);	
 			printf("mma_ld:data[4].s64=%x,data[5].s64=%x,new_data[2].s64=%x\n",data[4].u64,data[5].u64,nw_data[2].u64);	
@@ -5144,7 +5144,6 @@ void sured_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not
 void sust_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
 void suq_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); }
 
-ptx_reg_t* ptx_tex_regs = NULL;
 
 union intfloat {
    int a;
@@ -5258,9 +5257,10 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
    unsigned c_type = pI->get_type2();
    fflush(stdout);
    ptx_reg_t data1, data2, data3, data4;
-   if (!ptx_tex_regs) ptx_tex_regs = new ptx_reg_t[4];
+   if (!thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs)
+       thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs = new ptx_reg_t[4];
    unsigned nelem = src2.get_vect_nelem();
-   thread->get_vector_operand_values(src2, ptx_tex_regs, nelem); //ptx_reg should be 4 entry vector type...coordinates into texture
+   thread->get_vector_operand_values(src2, thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs, nelem); //ptx_reg should be 4 entry vector type...coordinates into texture
    /*
      For programs with many streams, textures can be bound and unbound
      asynchronously.  This means we need to use the kernel's "snapshot" of
@@ -5297,7 +5297,7 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
       height = cuArray->height;
       if (texref->normalized) {
          assert(c_type == F32_TYPE); 
-         x_f32 = ptx_tex_regs[0].f32;
+         x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
          if (texref->addressMode[0] == cudaAddressModeClamp) {
             x_f32 = (x_f32 > 1.0)? 1.0 : x_f32;
             x_f32 = (x_f32 < 0.0)? 0.0 : x_f32;
@@ -5320,11 +5320,11 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
       } else {
          switch ( c_type ) {
          case S32_TYPE: 
-            x = ptx_tex_regs[0].s32; 
+            x = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].s32;
             assert(texref->filterMode == cudaFilterModePoint); 
             break; 
          case F32_TYPE: 
-            x_f32 = ptx_tex_regs[0].f32; 
+            x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
             alpha = x_f32 - floor(x_f32); // offset into subtexel (for linear sampling)
             x = (int) x_f32; 
             break; 
@@ -5347,8 +5347,8 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
       width = cuArray->width;
       height = cuArray->height;
       if (texref->normalized) {
-         x_f32 = reduce_precision(ptx_tex_regs[0].f32,16);
-         y_f32 = reduce_precision(ptx_tex_regs[1].f32,15);
+         x_f32 = reduce_precision(thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32,16);
+         y_f32 = reduce_precision(thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[1].f32,15);
 
          if (texref->addressMode[0]) {//clamp
             if (x_f32<0) x_f32 = 0;
@@ -5378,8 +5378,8 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
             y = (int) floor(y_f32 * height);
          }
       } else {
-         x_f32 = ptx_tex_regs[0].f32;
-         y_f32 = ptx_tex_regs[1].f32;
+         x_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[0].f32;
+         y_f32 = thread->get_gpu()->gpgpu_ctx->func_sim->ptx_tex_regs[1].f32;
 
          alpha = x_f32 - floor(x_f32);
          beta = y_f32 - floor(y_f32);
diff --git a/src/cuda-sim/memory.cc b/src/cuda-sim/memory.cc
index 9554f55..4b2acdf 100644
--- a/src/cuda-sim/memory.cc
+++ b/src/cuda-sim/memory.cc
@@ -28,6 +28,7 @@
 #include "memory.h"
 #include <stdlib.h>
 #include "../debug.h"
+#include "../../libcuda/gpgpu_context.h"
 
 template<unsigned BSIZE> memory_space_impl<BSIZE>::memory_space_impl( std::string name, unsigned hash_size )
 {
@@ -88,7 +89,7 @@ template<unsigned BSIZE> void memory_space_impl<BSIZE>::write( mem_addr_t addr,
       for( i=m_watchpoints.begin(); i!=m_watchpoints.end(); i++ ) {
          mem_addr_t wa = i->second;
          if( ((addr<=wa) && ((addr+length)>wa)) || ((addr>wa) && (addr < (wa+4))) ) 
-            hit_watchpoint(i->first,thd,pI);
+            thd->get_gpu()->gpgpu_ctx->the_gpgpusim->g_the_gpu->hit_watchpoint(i->first,thd,pI);
       }
    }
 }
diff --git a/src/cuda-sim/ptx-stats.cc b/src/cuda-sim/ptx-stats.cc
index 0a9f08d..22517df 100644
--- a/src/cuda-sim/ptx-stats.cc
+++ b/src/cuda-sim/ptx-stats.cc
@@ -32,12 +32,9 @@
 #include <stdio.h>
 #include <map>
 #include "../tr1_hash_map.h"
+#include "../../libcuda/gpgpu_context.h"
 
-// options
-bool enable_ptx_file_line_stats;
-char * ptx_line_stats_filename = NULL;
-
-void ptx_file_line_stats_options(option_parser_t opp)
+void ptx_stats::ptx_file_line_stats_options(option_parser_t opp)
 {
     option_parser_register(opp, "-enable_ptx_file_line_stats", OPT_BOOL, 
                            &enable_ptx_file_line_stats, 
@@ -118,7 +115,7 @@ typedef tr1_hash_map<ptx_file_line, ptx_file_line_stats, hash_ptx_file_line> ptx
 static ptx_file_line_stats_map_t ptx_file_line_stats_tracker;
 
 // output statistics to a file
-void ptx_file_line_stats_write_file()
+void ptx_stats::ptx_file_line_stats_write_file()
 {
     // check if stat collection is turned on
     if (enable_ptx_file_line_stats == 0) return;
@@ -154,27 +151,27 @@ void ptx_file_line_stats_add_exec_count(const ptx_instruction *pInsn)
 
 // attribute pipeline latency to this ptx instruction (specified by the pc)
 // pipeline latency is the number of cycles a warp with this instruction spent in the pipeline
-void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency)
+void ptx_stats::ptx_file_line_stats_add_latency(unsigned pc, unsigned latency)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
     
     ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].latency += latency;
 }
 
 // attribute dram traffic to this ptx instruction (specified by the pc)
 // dram traffic is counted in number of requests 
-void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic)
+void ptx_stats::ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
     
     ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())].dram_traffic += dram_traffic;
 }
 
 // attribute the number of shared memory access cycles to a ptx instruction
 // counts both the number of warps doing shared memory access and the number of cycles involved
-void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict)
+void ptx_stats::ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
     
     ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
     line_stats.smem_n_way_bank_conflict_total += n_way_bkconflict;
@@ -183,9 +180,9 @@ void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkco
 
 // attribute a non-coalesced mem access to a ptx instruction 
 // counts both the number of warps causing this and the number of memory requests generated
-void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access)
+void ptx_stats::ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
     
     ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
     line_stats.gmem_n_access_total += n_access;
@@ -242,17 +239,17 @@ void ptx_file_line_stats_create_exposed_latency_tracker(int n_shader_cores)
 }
 
 // add an inflight memory instruction
-void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc)
+void ptx_stats::ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
 
     inflight_mem_tracker[sc_id].add_count(pInsn);
 }
 
 // remove an inflight memory instruction
-void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc)
+void ptx_stats::ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
 
     inflight_mem_tracker[sc_id].sub_count(pInsn);
 }
@@ -265,9 +262,9 @@ void ptx_file_line_stats_commit_exposed_latency(int sc_id, int exposed_latency)
 }
 
 // attribute the number of warp divergence to a ptx instruction
-void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence)
+void ptx_stats::ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence)
 {
-    const ptx_instruction *pInsn = function_info::pc_to_instruction(pc);
+    const ptx_instruction *pInsn = gpgpu_ctx->pc_to_instruction(pc);
     
     ptx_file_line_stats& line_stats = ptx_file_line_stats_tracker[ptx_file_line(pInsn->source_file(), pInsn->source_line())];
     line_stats.warp_divergence += n_way_divergence;
diff --git a/src/cuda-sim/ptx-stats.h b/src/cuda-sim/ptx-stats.h
index 4fc6599..246b4ce 100644
--- a/src/cuda-sim/ptx-stats.h
+++ b/src/cuda-sim/ptx-stats.h
@@ -29,13 +29,6 @@
 
 #include "../option_parser.h"
 
-extern bool enable_ptx_file_line_stats;
-
-// set options
-void ptx_file_line_stats_options(option_parser_t opp);
-
-// output stats to a file
-void ptx_file_line_stats_write_file();
 
 #ifdef __cplusplus
 // stat collection interface to cuda-sim
@@ -44,15 +37,32 @@ void ptx_file_line_stats_add_exec_count(const ptx_instruction *pInsn);
 #endif
 
 // stat collection interface to gpgpu-sim
-void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency);
-void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic);
-void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict);
-void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access);
 
 void ptx_file_line_stats_create_exposed_latency_tracker(int n_shader_cores);
-void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc);
-void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc);
 void ptx_file_line_stats_commit_exposed_latency(int sc_id, int exposed_latency);
 
-void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence);
 
+class gpgpu_context;
+class ptx_stats {
+    public:
+	ptx_stats(gpgpu_context* ctx) {
+	    ptx_line_stats_filename = NULL;
+	    gpgpu_ctx = ctx;
+	}
+	char * ptx_line_stats_filename;
+	bool enable_ptx_file_line_stats;
+	gpgpu_context* gpgpu_ctx;
+	// set options
+	void ptx_file_line_stats_options(option_parser_t opp);
+
+	// output stats to a file
+	void ptx_file_line_stats_write_file();
+	// stat collection interface to gpgpu-sim
+	void ptx_file_line_stats_add_latency(unsigned pc, unsigned latency);
+	void ptx_file_line_stats_add_dram_traffic(unsigned pc, unsigned dram_traffic);
+	void ptx_file_line_stats_add_smem_bank_conflict(unsigned pc, unsigned n_way_bkconflict);
+	void ptx_file_line_stats_add_uncoalesced_gmem(unsigned pc, unsigned n_access);
+	void ptx_file_line_stats_add_inflight_memory_insn(int sc_id, unsigned pc);
+	void ptx_file_line_stats_sub_inflight_memory_insn(int sc_id, unsigned pc);
+	void ptx_file_line_stats_add_warp_divergence(unsigned pc, unsigned n_way_divergence);
+};
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index c537091..3384d49 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -39,14 +39,21 @@ typedef void * yyscan_t;
 #include "assert.h"
 
 #include "cuda-sim.h"
+#include "../../libcuda/gpgpu_context.h"
 
 #define STR_SIZE 1024
 
-unsigned symbol::sm_next_uid = 1;
+const ptx_instruction* gpgpu_context::pc_to_instruction(unsigned pc) 
+{
+    if( pc < s_g_pc_to_insn.size() )
+	return s_g_pc_to_insn[pc];
+    else
+	return NULL;
+}
 
 unsigned symbol::get_uid()
 {
-   unsigned result = sm_next_uid++;
+   unsigned result = (gpgpu_ctx->symbol_sm_next_uid)++;
    return result;
 }
 
@@ -151,7 +158,7 @@ symbol *symbol_table::add_variable( const char *identifier, const type_info *typ
    std::string key(identifier);
    assert( m_symbols.find(key) == m_symbols.end() );
    snprintf(buf,1024,"%s:%u",filename,line);
-   symbol *s = new symbol(identifier,type,buf,size);
+   symbol *s = new symbol(identifier,type,buf,size,gpgpu_ctx);
    m_symbols[ key ] = s;
 
    if ( type != NULL && type->get_key().is_global()  ) {
@@ -172,7 +179,7 @@ void symbol_table::add_function( function_info *func, const char *filename, unsi
    char buf[1024];
    snprintf(buf,1024,"%s:%u",filename,linenumber);
    type_info *type = add_type( func );
-   symbol *s = new symbol(func->get_name().c_str(),type,buf,0);
+   symbol *s = new symbol(func->get_name().c_str(),type,buf,0,gpgpu_ctx);
    s->set_function(func);
    m_symbols[ func->get_name() ] = s;
 }
@@ -322,11 +329,9 @@ void symbol_table::dump()
    printf("\n");
 }
 
-unsigned operand_info::sm_next_uid=1;
-
 unsigned operand_info::get_uid()
 {
-   unsigned result = sm_next_uid++;
+   unsigned result = (gpgpu_ctx->operand_info_sm_next_uid)++;
    return result;
 }
 
@@ -1015,7 +1020,7 @@ void copy_buffer_to_frame(ptx_thread_info * thread, const arg_buffer_t &a)
 {
    if( a.is_reg() ) {
       ptx_reg_t value = a.get_reg();
-      operand_info dst_reg = operand_info(a.get_dst()); 
+      operand_info dst_reg = operand_info(a.get_dst(), thread->get_gpu()->gpgpu_ctx); 
       thread->set_reg(dst_reg.get_symbol(),value);
    } else {  
       const void *buffer = a.get_param_buffer();
@@ -1039,7 +1044,8 @@ void copy_buffer_list_into_frame(ptx_thread_info * thread, arg_buffer_list_t &ar
 
 static std::list<operand_info> check_operands( int opcode,
                                         const std::list<int> &scalar_type,
-                                        const std::list<operand_info> &operands )
+                                        const std::list<operand_info> &operands,
+					gpgpu_context* ctx)
 {
    static int g_warn_literal_operands_two_type_inst;
     if( (opcode == CVT_OP) || (opcode == SET_OP) || (opcode == SLCT_OP) || (opcode == TEX_OP) || (opcode==MMA_OP) || (opcode == DP4A_OP)) {
@@ -1066,7 +1072,7 @@ static std::list<operand_info> check_operands( int opcode,
                     if( (op.get_type() == double_op_t) && (inst_type == F32_TYPE) ) {
                         ptx_reg_t v = op.get_literal_value();
                         float u = (float)v.f64;
-                        operand_info n(u);
+                        operand_info n(u, ctx);
                         result.push_back(n);
                     } else {
                         result.push_back(op);
@@ -1097,17 +1103,17 @@ ptx_instruction::ptx_instruction( int opcode,
                                   unsigned line,
                                   const char *source,
                                   const core_config *config,
-				  gpgpu_context* ctx ) : warp_inst_t(config)
+				  gpgpu_context* ctx ) : warp_inst_t(config), m_return_var(ctx)
 {
    gpgpu_ctx = ctx;
-   m_uid = ++g_num_ptx_inst_uid;
+   m_uid = ++(ctx->g_num_ptx_inst_uid);
    m_PC = 0;
    m_opcode = opcode;
    m_pred = pred;
    m_neg_pred = neg_pred;
    m_pred_mod = pred_mod;
    m_label = label;
-   const std::list<operand_info> checked_operands = check_operands(opcode,scalar_type,operands);
+   const std::list<operand_info> checked_operands = check_operands(opcode,scalar_type,operands, ctx);
    m_operands.insert(m_operands.begin(), checked_operands.begin(), checked_operands.end() );
    m_return_var = return_var;
    m_options = options;
@@ -1371,13 +1377,16 @@ std::string ptx_instruction::to_string() const
                            m_source.c_str() );
    return std::string( buf );
 }
+operand_info ptx_instruction::get_pred() const
+{
+    return operand_info( m_pred, gpgpu_ctx);
+}
 
-unsigned function_info::sm_next_uid = 1;
 
 function_info::function_info(int entry_point, gpgpu_context* ctx )
 {
    gpgpu_ctx = ctx;
-   m_uid = sm_next_uid++;
+   m_uid = (gpgpu_ctx->function_info_sm_next_uid)++;
    m_entry_point = (entry_point==1)?true:false;
    m_extern = (entry_point==2)?true:false;
    num_reconvergence_pairs = 0;
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index babd54b..f4c5c37 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -152,8 +152,9 @@ class operand_info;
 
 class symbol {
 public:
-   symbol( const char *name, const type_info *type, const char *location, unsigned size ) 
+   symbol( const char *name, const type_info *type, const char *location, unsigned size, gpgpu_context* ctx ) 
    {
+      gpgpu_ctx = ctx;
       m_uid = get_uid();
       m_name = name;
       m_decl_location = location;
@@ -273,6 +274,7 @@ public:
    unsigned uid() const { return m_uid; }
 
 private:
+   gpgpu_context* gpgpu_ctx;
    unsigned get_uid();
    unsigned m_uid;
    const type_info *m_type;
@@ -299,8 +301,6 @@ private:
    bool m_reg_num_valid; 
 
    std::list<operand_info> m_initializer;
-   static unsigned sm_next_uid;
-   
 };
 
 class symbol_table {
@@ -377,9 +377,9 @@ private:
 
 class operand_info {
 public:
-   operand_info()
+   operand_info(gpgpu_context* ctx)
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -392,9 +392,9 @@ public:
       m_addr_offset = 0;
       m_value.m_symbolic=NULL;
    }
-   operand_info( const symbol *addr )
+   operand_info( const symbol *addr, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -435,9 +435,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( const symbol *addr1, const symbol *addr2 )
+   operand_info( const symbol *addr1, const symbol *addr2, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -462,9 +462,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( int builtin_id, int dim_mod )
+   operand_info( int builtin_id, int dim_mod, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -481,9 +481,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( const symbol *addr, int offset )
+   operand_info( const symbol *addr, int offset, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -500,9 +500,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( unsigned x )
+   operand_info( unsigned x, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -519,9 +519,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=true;
    }
-   operand_info( int x )
+   operand_info( int x, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -538,9 +538,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( float x )
+   operand_info( float x, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -557,9 +557,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( double x )
+   operand_info( double x, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -576,9 +576,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 )
+   operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4, gpgpu_context* ctx )
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -603,9 +603,9 @@ public:
       m_is_return_var = false;
       m_immediate_address=false;
    }
-   operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 ,const symbol *s5,const symbol *s6,const symbol *s7, const symbol *s8)
+   operand_info( const symbol *s1, const symbol *s2, const symbol *s3, const symbol *s4 ,const symbol *s5,const symbol *s6,const symbol *s7, const symbol *s8, gpgpu_context* ctx)
    {
-      init();
+      init(ctx);
       m_is_non_arch_reg = false;
       m_addr_space = undefined_space;
       m_operand_lohi = 0;
@@ -631,8 +631,9 @@ public:
       m_immediate_address=false;
    }
 
-   void init()
+   void init(gpgpu_context* ctx)
    {
+       gpgpu_ctx = ctx;
        m_uid=(unsigned)-1;
        m_valid=false;
        m_vector=false;
@@ -842,6 +843,7 @@ public:
    bool is_non_arch_reg() const { return m_is_non_arch_reg; }
 
 private:
+   gpgpu_context* gpgpu_ctx;
    unsigned m_uid;
    bool m_valid;
    bool m_vector;
@@ -871,12 +873,10 @@ private:
    bool m_is_return_var;
    bool m_is_non_arch_reg;
 
-   static unsigned sm_next_uid;
    unsigned get_uid();
 };
 
 extern const char *g_opcode_string[];
-extern unsigned g_num_ptx_inst_uid;
 struct basic_block_t {
    basic_block_t( unsigned ID, ptx_instruction *begin, ptx_instruction *end, bool entry, bool ex)
    {
@@ -957,7 +957,7 @@ public:
    unsigned source_line() const { return m_source_line;}
    unsigned get_num_operands() const { return m_operands.size();}
    bool has_pred() const { return m_pred != NULL;}
-   operand_info get_pred() const { return operand_info( m_pred );}
+   operand_info get_pred() const;
    bool get_pred_neg() const { return m_neg_pred;}
    int get_pred_mod() const { return m_pred_mod;}
    const char *get_source() const { return m_source.c_str();}
@@ -1192,7 +1192,6 @@ private:
 
    virtual void pre_decode();
    friend class function_info;
-   static unsigned g_num_ptx_inst_uid;
    // backward pointer
    class gpgpu_context* gpgpu_ctx;
 };
@@ -1373,13 +1372,6 @@ public:
       return m_symtab;
    }
 
-   static const ptx_instruction* pc_to_instruction(unsigned pc) 
-   {
-      if( pc < s_g_pc_to_insn.size() )
-          return s_g_pc_to_insn[pc];
-      else
-          return NULL;
-   }
    unsigned local_mem_framesize() const 
    { 
       return m_local_mem_framesize; 
@@ -1437,9 +1429,6 @@ private:
 
    symbol_table *m_symtab;
 
-   static std::vector<ptx_instruction*> s_g_pc_to_insn; // a direct mapping from PC to instruction
-   static unsigned sm_next_uid;
-
    //parameter size for device kernels
    int m_args_aligned_size;
    
@@ -1448,14 +1437,14 @@ private:
 
 class arg_buffer_t {
 public:
-   arg_buffer_t()
+   arg_buffer_t(gpgpu_context* ctx) : m_src_op(ctx)
    {
       m_is_reg=false;
       m_is_param=false;
       m_param_value=NULL;
       m_reg_value=ptx_reg_t();
    }
-   arg_buffer_t( const arg_buffer_t &another )
+   arg_buffer_t( const arg_buffer_t &another, gpgpu_context* ctx ) : m_src_op(ctx)
    {
       make_copy(another);
    }
diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc
index 2bf464c..dca3cec 100644
--- a/src/cuda-sim/ptx_loader.cc
+++ b/src/cuda-sim/ptx_loader.cc
@@ -35,10 +35,6 @@
 #include <sstream>
 #include "../../libcuda/gpgpu_context.h"
 
-/// globals
-
-bool g_override_embedded_ptx = false;
-
 /// extern prototypes
 
 extern int ptx_error( yyscan_t yyscanner, const char *s );
@@ -90,7 +86,7 @@ void gpgpu_context::print_ptx_file( const char *p, unsigned source_num, const ch
       while ( (*u != '\n') && (*u != '\0') ) u++;
       unsigned last = (*u == '\0');
       *u = '\0';
-      const ptx_instruction *pI = ptx_instruction_lookup(filename,n);
+      const ptx_instruction *pI = ptx_parser->ptx_instruction_lookup(filename,n);
       char pc[64];
       if( pI && pI->get_PC() )
          snprintf(pc,64,"%4u", pI->get_PC() );
@@ -334,8 +330,7 @@ void gpgpu_context::gpgpu_ptx_info_load_from_filename( const char *filename, uns
     std::string ptxas_filename(std::string(filename) + "as");
     char buff[1024], extra_flags[1024];
 	extra_flags[0]=0;
-    extern bool g_cdp_enabled;
-	if(!g_cdp_enabled)
+	if(!device_runtime->g_cdp_enabled)
 	       	snprintf(extra_flags,1024,"--gpu-name=sm_%u",sm_version);
 	else
 	       	snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",sm_version);
@@ -402,8 +397,7 @@ void gpgpu_context::gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsi
                          "A register size/SM mismatch may result in occupancy differences." );
         exit(1);
     }
-    extern bool g_cdp_enabled;
-    if(!g_cdp_enabled)
+    if(!device_runtime->g_cdp_enabled)
         snprintf(extra_flags,1024,"--gpu-name=sm_%u", g_occupancy_sm_number);
     else
         snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",g_occupancy_sm_number);
@@ -471,8 +465,7 @@ void gpgpu_context::gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsi
 
 	#if CUDART_VERSION >= 3000
 	if (sm_version == 0) sm_version = 20;
-    	extern bool g_cdp_enabled;
-	if(!g_cdp_enabled)
+	if(!device_runtime->g_cdp_enabled)
 	       	snprintf(extra_flags,1024,"--gpu-name=sm_%u",sm_version);
 	else
 	       	snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",sm_version);
diff --git a/src/cuda-sim/ptx_loader.h b/src/cuda-sim/ptx_loader.h
index decfdc8..d8f1cbc 100644
--- a/src/cuda-sim/ptx_loader.h
+++ b/src/cuda-sim/ptx_loader.h
@@ -49,8 +49,4 @@ class ptxinfo_data{
 	char* gpgpu_ptx_sim_convert_ptx_and_sass_to_ptxplus(const std::string ptx_str, const std::string sass_str, const std::string elf_str);
 };
 
-
-extern bool g_override_embedded_ptx;
-extern int no_of_ptx; //counter to track number of ptx files to be extracted in an application.
- 
 #endif
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index 5a94679..81b70af 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -47,8 +47,6 @@ void ptx_recognizer::set_ptx_warp_size(const struct core_config * warp_size)
    g_shader_core_config=warp_size;
 }
 
-// the program intermediate representation...
-std::map<std::string,symbol_table*> g_sym_name_to_symbol_table;
 
 #define PTX_PARSE_DPRINTF(...) \
    if( g_debug_ir_generation ) { \
@@ -104,7 +102,7 @@ void ptx_recognizer::init_instruction_state()
    g_opcode = -1;
    g_options.clear();
    g_wmma_options.clear();
-   g_return_var = operand_info();
+   g_return_var = operand_info(gpgpu_ctx);
    init_directive_state();
 }
 
@@ -254,9 +252,8 @@ void ptx_recognizer::set_return()
    g_return_var = g_operands.front();
 }
 
-std::map<std::string,std::map<unsigned,const ptx_instruction*> > g_inst_lookup;
 
-const ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber )
+const ptx_instruction *ptx_recognizer::ptx_instruction_lookup( const char *filename, unsigned linenumber )
 {
    std::map<std::string,std::map<unsigned,const ptx_instruction*> >::iterator f=g_inst_lookup.find(filename);
    if( f == g_inst_lookup.end() ) 
@@ -692,7 +689,7 @@ void ptx_recognizer::add_double_operand( const char *d1, const char *d2 )
    const symbol *s1 = g_current_symbol_table->lookup(d1);
    const symbol *s2 = g_current_symbol_table->lookup(d2);
    parse_assert( s1 != NULL && s2 != NULL, "component(s) missing declarations.");
-   g_operands.push_back( operand_info(s1,s2) );
+   g_operands.push_back( operand_info(s1,s2,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_1vector_operand( const char *d1 )
@@ -701,7 +698,7 @@ void ptx_recognizer::add_1vector_operand( const char *d1 )
    PTX_PARSE_DPRINTF("add_1vector_operand");
    const symbol *s1 = g_current_symbol_table->lookup(d1);
    parse_assert( s1 != NULL, "component(s) missing declarations.");
-   g_operands.push_back( operand_info(s1,NULL,NULL,NULL) );
+   g_operands.push_back( operand_info(s1,NULL,NULL,NULL,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_2vector_operand( const char *d1, const char *d2 )
@@ -710,7 +707,7 @@ void ptx_recognizer::add_2vector_operand( const char *d1, const char *d2 )
    const symbol *s1 = g_current_symbol_table->lookup(d1);
    const symbol *s2 = g_current_symbol_table->lookup(d2);
    parse_assert( s1 != NULL && s2 != NULL, "v2 component(s) missing declarations.");
-   g_operands.push_back( operand_info(s1,s2,NULL,NULL) );
+   g_operands.push_back( operand_info(s1,s2,NULL,NULL,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_3vector_operand( const char *d1, const char *d2, const char *d3 )
@@ -720,7 +717,7 @@ void ptx_recognizer::add_3vector_operand( const char *d1, const char *d2, const
    const symbol *s2 = g_current_symbol_table->lookup(d2);
    const symbol *s3 = g_current_symbol_table->lookup(d3);
    parse_assert( s1 != NULL && s2 != NULL && s3 != NULL, "v3 component(s) missing declarations.");
-   g_operands.push_back( operand_info(s1,s2,s3,NULL) );
+   g_operands.push_back( operand_info(s1,s2,s3,NULL,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_4vector_operand( const char *d1, const char *d2, const char *d3, const char *d4 )
@@ -735,7 +732,7 @@ void ptx_recognizer::add_4vector_operand( const char *d1, const char *d2, const
    if ( s2 == null_op ) s2 = NULL;
    if ( s3 == null_op ) s3 = NULL;
    if ( s4 == null_op ) s4 = NULL;
-   g_operands.push_back( operand_info(s1,s2,s3,s4) );
+   g_operands.push_back( operand_info(s1,s2,s3,s4,gpgpu_ctx) );
 }
 void ptx_recognizer::add_8vector_operand( const char *d1, const char *d2, const char *d3, const char *d4,const char *d5,const char *d6,const char *d7,const char *d8 )
 {
@@ -757,13 +754,13 @@ void ptx_recognizer::add_8vector_operand( const char *d1, const char *d2, const
    if ( s6 == null_op ) s6 = NULL;
    if ( s7 == null_op ) s7 = NULL;
    if ( s8 == null_op ) s8 = NULL;
-   g_operands.push_back( operand_info(s1,s2,s3,s4,s5,s6,s7,s8) );
+   g_operands.push_back( operand_info(s1,s2,s3,s4,s5,s6,s7,s8,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_builtin_operand( int builtin, int dim_modifier )
 {
    PTX_PARSE_DPRINTF("add_builtin_operand");
-   g_operands.push_back( operand_info(builtin,dim_modifier) );
+   g_operands.push_back( operand_info(builtin,dim_modifier,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_memory_operand()
@@ -886,19 +883,19 @@ void ptx_recognizer::change_operand_neg( )
 void ptx_recognizer::add_literal_int( int value )
 {
    PTX_PARSE_DPRINTF("add_literal_int");
-   g_operands.push_back( operand_info(value) );
+   g_operands.push_back( operand_info(value,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_literal_float( float value )
 {
    PTX_PARSE_DPRINTF("add_literal_float");
-   g_operands.push_back( operand_info(value) );
+   g_operands.push_back( operand_info(value,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_literal_double( double value )
 {
    PTX_PARSE_DPRINTF("add_literal_double");
-   g_operands.push_back( operand_info(value) );
+   g_operands.push_back( operand_info(value,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_scalar_operand( const char *identifier )
@@ -914,7 +911,7 @@ void ptx_recognizer::add_scalar_operand( const char *identifier )
          parse_error( msg.c_str() );
       }
    }
-   g_operands.push_back( operand_info(s) );
+   g_operands.push_back( operand_info(s,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_neg_pred_operand( const char *identifier )
@@ -924,7 +921,7 @@ void ptx_recognizer::add_neg_pred_operand( const char *identifier )
    if ( s == NULL ) {
        s = g_current_symbol_table->add_variable(identifier,NULL,1,gpgpu_ctx->g_filename,ptx_get_lineno(scanner));
    }
-   operand_info op(s);
+   operand_info op(s, gpgpu_ctx);
    op.set_neg_pred();
    g_operands.push_back( op );
 }
@@ -937,13 +934,13 @@ void ptx_recognizer::add_address_operand( const char *identifier, int offset )
       std::string msg = std::string("operand \"") + identifier + "\" has no declaration.";
       parse_error( msg.c_str() );
    }
-   g_operands.push_back( operand_info(s,offset) );
+   g_operands.push_back( operand_info(s,offset,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_address_operand2( int offset )
 {
    PTX_PARSE_DPRINTF("add_address_operand");
-   g_operands.push_back( operand_info((unsigned)offset) );
+   g_operands.push_back( operand_info((unsigned)offset,gpgpu_ctx) );
 }
 
 void ptx_recognizer::add_array_initializer()
diff --git a/src/cuda-sim/ptx_parser.h b/src/cuda-sim/ptx_parser.h
index ef422e5..11a3d20 100644
--- a/src/cuda-sim/ptx_parser.h
+++ b/src/cuda-sim/ptx_parser.h
@@ -31,15 +31,11 @@
 #include "../abstract_hardware_model.h"
 #include "ptx_ir.h"
 
-#ifdef __cplusplus 
-const class ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber );
-#endif
-
 class gpgpu_context;
 typedef void * yyscan_t;
 class ptx_recognizer {
     public:
-	ptx_recognizer( gpgpu_context* ctx ) {
+	ptx_recognizer( gpgpu_context* ctx ) : g_return_var(ctx) {
 	    scanner = NULL;
 	    g_size = -1;
 	    g_add_identifier_cached__identifier = NULL;
@@ -107,6 +103,9 @@ class ptx_recognizer {
 	bool g_debug_ir_generation;
 	int g_entry_point;
 	const struct core_config *g_shader_core_config;
+	std::map<std::string,std::map<unsigned,const ptx_instruction*> > g_inst_lookup;
+	// the program intermediate representation...
+	std::map<std::string,symbol_table*> g_sym_name_to_symbol_table;
 	// backward pointer
 	class gpgpu_context* gpgpu_ctx;
 
@@ -177,6 +176,7 @@ class ptx_recognizer {
 	bool check_for_duplicates( const char *identifier );
 	void read_parser_environment_variables(); 
 	void set_ptx_warp_size(const struct core_config * warp_size);
+	const class ptx_instruction *ptx_instruction_lookup( const char *filename, unsigned linenumber );
 
 };
 
diff --git a/src/cuda-sim/ptx_sim.cc b/src/cuda-sim/ptx_sim.cc
index 1b8831a..949ee66 100644
--- a/src/cuda-sim/ptx_sim.cc
+++ b/src/cuda-sim/ptx_sim.cc
@@ -33,20 +33,20 @@ typedef void * yyscan_t;
 #include "ptx.tab.h"
 #include "../gpgpu-sim/gpu-sim.h"
 #include "../gpgpu-sim/shader.h"
+#include "../../libcuda/gpgpu_context.h"
 
 void feature_not_implemented( const char *f );
 
-std::set<unsigned long long> g_ptx_cta_info_sm_idx_used;
-unsigned long long g_ptx_cta_info_uid = 1;
 
-ptx_cta_info::ptx_cta_info( unsigned sm_idx )
+ptx_cta_info::ptx_cta_info( unsigned sm_idx, gpgpu_context* ctx )
 {
-   assert( g_ptx_cta_info_sm_idx_used.find(sm_idx) == g_ptx_cta_info_sm_idx_used.end() );
-   g_ptx_cta_info_sm_idx_used.insert(sm_idx);
+   assert( ctx->func_sim->g_ptx_cta_info_sm_idx_used.find(sm_idx) == ctx->func_sim->g_ptx_cta_info_sm_idx_used.end() );
+   ctx->func_sim->g_ptx_cta_info_sm_idx_used.insert(sm_idx);
 
    m_sm_idx = sm_idx;
-   m_uid = g_ptx_cta_info_uid++;
+   m_uid = (ctx->g_ptx_cta_info_uid)++;
    m_bar_threads = 0;
+   gpgpu_ctx = ctx;
 }
 
 void ptx_cta_info::add_thread( ptx_thread_info *thd )
@@ -166,18 +166,16 @@ void ptx_warp_info::reset_done_threads()
 	m_done_threads = 0;
 }
 
-unsigned g_ptx_thread_info_uid_next=1;
-unsigned g_ptx_thread_info_delete_count=0;
 
 ptx_thread_info::~ptx_thread_info()
 {
-   g_ptx_thread_info_delete_count++;
+   m_gpu->gpgpu_ctx->func_sim->g_ptx_thread_info_delete_count++;
 }
 
 ptx_thread_info::ptx_thread_info( kernel_info_t &kernel )
     : m_kernel(kernel)
 {
-   m_uid = g_ptx_thread_info_uid_next++;
+   m_uid = kernel.entry()->gpgpu_ctx->func_sim->g_ptx_thread_info_uid_next++;
    m_core = NULL;
    m_barrier_num = -1;
    m_at_barrier = false;
@@ -423,9 +421,9 @@ bool ptx_thread_info::callstack_pop()
    assert( !((rv_src != NULL) ^ (rv_dst != NULL)) ); // ensure caller and callee agree on whether there is a return value
 
    // read return value from callee frame
-   arg_buffer_t buffer;
+   arg_buffer_t buffer(m_gpu->gpgpu_ctx);
    if( rv_src != NULL ) 
-      buffer = copy_arg_to_buffer(this, operand_info(rv_src), rv_dst );
+      buffer = copy_arg_to_buffer(this, operand_info(rv_src, m_gpu->gpgpu_ctx), rv_dst );
 
    m_symbol_table = m_callstack.back().m_symbol_table;
    m_NPC = m_callstack.back().m_PC;
@@ -457,9 +455,9 @@ bool ptx_thread_info::callstack_pop_plus()
    assert( !((rv_src != NULL) ^ (rv_dst != NULL)) ); // ensure caller and callee agree on whether there is a return value
 
    // read return value from callee frame
-   arg_buffer_t buffer;
+   arg_buffer_t buffer(m_gpu->gpgpu_ctx);
    if( rv_src != NULL )
-      buffer = copy_arg_to_buffer(this, operand_info(rv_src), rv_dst );
+      buffer = copy_arg_to_buffer(this, operand_info(rv_src, m_gpu->gpgpu_ctx), rv_dst );
 
    m_symbol_table = m_callstack.back().m_symbol_table;
    m_NPC = m_callstack.back().m_PC;
diff --git a/src/cuda-sim/ptx_sim.h b/src/cuda-sim/ptx_sim.h
index a045a76..c2b3cc8 100644
--- a/src/cuda-sim/ptx_sim.h
+++ b/src/cuda-sim/ptx_sim.h
@@ -164,7 +164,7 @@ class ptx_thread_info;
 
 class ptx_cta_info {
 public:
-   ptx_cta_info( unsigned sm_idx );
+   ptx_cta_info( unsigned sm_idx, gpgpu_context* ctx );
    void add_thread( ptx_thread_info *thd );
    unsigned num_threads() const;
    void check_cta_thread_status_and_reset();
@@ -176,6 +176,8 @@ public:
    void reset_bar_threads();
 
 private:
+   // backward pointer
+   class gpgpu_context* gpgpu_ctx;
    unsigned           m_bar_threads;
    unsigned long long         m_uid;
    unsigned                m_sm_idx;
diff --git a/src/debug.cc b/src/debug.cc
index ae15760..c00ff9e 100644
--- a/src/debug.cc
+++ b/src/debug.cc
@@ -36,28 +36,7 @@
 #include <stdio.h>
 #include <string.h>
 
-class watchpoint_event {
-public:
-   watchpoint_event()
-   {
-      m_thread=NULL;
-      m_inst=NULL;
-   }
-   watchpoint_event(const ptx_thread_info *thd, const ptx_instruction *pI) 
-   {
-      m_thread=thd;
-      m_inst = pI;
-   }
-   const ptx_thread_info *thread() const { return m_thread; }
-   const ptx_instruction *inst() const { return m_inst; }
-private:
-   const ptx_thread_info *m_thread;
-   const ptx_instruction *m_inst;
-};
-
-std::map<unsigned,watchpoint_event> g_watchpoint_hits;
-
-void hit_watchpoint( unsigned watchpoint_num, ptx_thread_info *thd, const ptx_instruction *pI )
+void gpgpu_sim::hit_watchpoint( unsigned watchpoint_num, ptx_thread_info *thd, const ptx_instruction *pI )
 {
    g_watchpoint_hits[watchpoint_num]=watchpoint_event(thd,pI);
 }
diff --git a/src/debug.h b/src/debug.h
index 1005bd5..4e79a9f 100644
--- a/src/debug.h
+++ b/src/debug.h
@@ -86,6 +86,5 @@ private:
 class ptx_thread_info;
 class ptx_instruction;
 bool thread_at_brkpt( ptx_thread_info *thd_info, const class brk_pt &b );
-void hit_watchpoint( unsigned watchpoint_num, ptx_thread_info *thd, const ptx_instruction *pI );
 
 #endif
diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index 5e36d4b..d443d79 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -41,7 +41,7 @@ int PRINT_CYCLE = 0;
 template class fifo_pipeline<mem_fetch>;
 template class fifo_pipeline<dram_req_t>;
 
-dram_t::dram_t( unsigned int partition_id, const struct memory_config *config, memory_stats_t *stats,
+dram_t::dram_t( unsigned int partition_id, const memory_config *config, memory_stats_t *stats,
                 memory_partition_unit *mp, gpgpu_sim* gpu )
 {
    id = partition_id;
diff --git a/src/gpgpu-sim/dram.h b/src/gpgpu-sim/dram.h
index 7a3a2da..0bd9725 100644
--- a/src/gpgpu-sim/dram.h
+++ b/src/gpgpu-sim/dram.h
@@ -106,11 +106,12 @@ enum bank_grp_bits_position{
 };
 
 class mem_fetch;
+class memory_config;
 
 class dram_t 
 {
 public:
-   dram_t( unsigned int parition_id, const struct memory_config *config, class memory_stats_t *stats, 
+   dram_t( unsigned int parition_id, const memory_config *config, class memory_stats_t *stats,
            class memory_partition_unit *mp, class gpgpu_sim* gpu );
 
    bool full(bool is_write) const;
@@ -145,7 +146,7 @@ public:
 
 
 
-   const struct memory_config *m_config;
+   const memory_config *m_config;
 
 private:
    bankgrp_t **bkgrp;
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index f1f6e19..1705821 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -1251,7 +1251,8 @@ data_cache::wr_miss_wa_naive( new_addr_type addr,
                         false, // Now performing a read
                         mf->get_access_warp_mask(),
                         mf->get_access_byte_mask(),
-		                mf->get_access_sector_mask());
+		                mf->get_access_sector_mask(),
+				m_gpu->gpgpu_ctx);
 
     mem_fetch *n_mf = new mem_fetch( *ma,
                     NULL,
@@ -1365,7 +1366,8 @@ data_cache::wr_miss_wa_fetch_on_write( new_addr_type addr,
 									false, // Now performing a read
 									mf->get_access_warp_mask(),
 									mf->get_access_byte_mask(),
-									mf->get_access_sector_mask());
+									mf->get_access_sector_mask(),
+									m_gpu->gpgpu_ctx);
 
 		  mem_fetch *n_mf = new mem_fetch( *ma,
 								NULL,
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 93f041a..e4ae04f 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -545,16 +545,14 @@ void gpgpu_sim_config::reg_options(option_parser_t opp)
     option_parser_register(opp, "-trace_sampling_memory_partition", OPT_INT32, 
                           &Trace::sampling_memory_partition, "The memory partition which is printed using MEMPART_DPRINTF. Default -1 (i.e. all)",
                           "-1");
-   ptx_file_line_stats_options(opp);
+    gpgpu_ctx->stats->ptx_file_line_stats_options(opp);
 
     //Jin: kernel launch latency
-    extern unsigned g_kernel_launch_latency;
     option_parser_register(opp, "-gpgpu_kernel_launch_latency", OPT_INT32, 
-                          &g_kernel_launch_latency, "Kernel launch latency in cycles. Default: 0",
+                          &(gpgpu_ctx->device_runtime->g_kernel_launch_latency), "Kernel launch latency in cycles. Default: 0",
                           "0");
-    extern bool g_cdp_enabled;
     option_parser_register(opp, "-gpgpu_cdp_enabled", OPT_BOOL, 
-                          &g_cdp_enabled, "Turn on CDP",
+                          &(gpgpu_ctx->device_runtime->g_cdp_enabled), "Turn on CDP",
                           "0");
 }
 
@@ -888,7 +886,7 @@ void gpgpu_sim::init()
     m_shader_stats->new_grid();
     // initialize the control-flow, memory access, memory latency logger
     if (m_config.g_visualizer_enabled) {
-        create_thread_CFlogger( m_config.num_shader(), m_shader_config->n_thread_per_shader, 0, m_config.gpgpu_cflog_interval );
+        create_thread_CFlogger( gpgpu_ctx, m_config.num_shader(), m_shader_config->n_thread_per_shader, 0, m_config.gpgpu_cflog_interval );
     }
     shader_CTA_count_create( m_config.num_shader(), m_config.gpgpu_cflog_interval);
     if (m_config.gpgpu_cflog_interval != 0) {
@@ -934,7 +932,7 @@ void gpgpu_sim::update_stats() {
 
 void gpgpu_sim::print_stats()
 {
-    ptx_file_line_stats_write_file();
+    gpgpu_ctx->stats->ptx_file_line_stats_write_file();
     gpu_print_stat();
 
     if (g_network_mode) {
@@ -1107,8 +1105,7 @@ void gpgpu_sim::gpu_print_stat()
    printf("gpu_tot_occupancy = %.4f\% \n", (gpu_occupancy + gpu_tot_occupancy).get_occ_fraction() * 100);
 
 
-   extern unsigned long long g_max_total_param_size;
-   fprintf(statfout, "max_total_param_size = %llu\n", g_max_total_param_size);
+   fprintf(statfout, "max_total_param_size = %llu\n", gpgpu_ctx->device_runtime->g_max_total_param_size);
 
    // performance counter for stalls due to congestion.
    printf("gpu_stall_dramfull = %d\n", gpu_stall_dramfull);
@@ -1831,7 +1828,7 @@ const shader_core_config * gpgpu_sim::getShaderCoreConfig()
    return m_shader_config;
 }
 
-const struct memory_config * gpgpu_sim::getMemoryConfig()
+const memory_config * gpgpu_sim::getMemoryConfig()
 {
    return m_memory_config;
 }
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index 119b934..19e1eb3 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -33,6 +33,7 @@
 #include "../trace.h"
 #include "addrdec.h"
 #include "shader.h"
+#include "gpu-cache.h"
 #include <iostream>
 #include <fstream>
 #include <list>
@@ -143,13 +144,14 @@ struct power_config {
 };
 
 
-
-struct memory_config {
-   memory_config()
+class memory_config {
+    public:
+   memory_config(gpgpu_context* ctx)
    {
        m_valid = false;
        gpgpu_dram_timing_opt=NULL;
        gpgpu_L2_queue_config=NULL;
+       gpgpu_ctx = ctx;
    }
    void init()
    {
@@ -291,13 +293,14 @@ struct memory_config {
    unsigned write_high_watermark;
    unsigned write_low_watermark;
    bool m_perf_sim_memcpy;
+   gpgpu_context* gpgpu_ctx;
 };
 
 extern bool g_interactive_debugger_enabled;
 
 class gpgpu_sim_config : public power_config, public gpgpu_functional_sim_config {
 public:
-    gpgpu_sim_config(gpgpu_context* ctx): m_shader_config(ctx) {
+    gpgpu_sim_config(gpgpu_context* ctx): m_shader_config(ctx), m_memory_config(ctx) {
 	m_valid = false;
 	gpgpu_ctx = ctx;
     }
@@ -424,6 +427,26 @@ struct occupancy_stats {
 };
 
 class gpgpu_context;
+class ptx_instruction;
+
+class watchpoint_event {
+public:
+   watchpoint_event()
+   {
+      m_thread=NULL;
+      m_inst=NULL;
+   }
+   watchpoint_event(const ptx_thread_info *thd, const ptx_instruction *pI)
+   {
+      m_thread=thd;
+      m_inst = pI;
+   }
+   const ptx_thread_info *thread() const { return m_thread; }
+   const ptx_instruction *inst() const { return m_inst; }
+private:
+   const ptx_thread_info *m_thread;
+   const ptx_instruction *m_inst;
+};
 
 class gpgpu_sim : public gpgpu_t {
 public:
@@ -487,7 +510,7 @@ public:
     /*!
     * Returning the memory configuration of the shader core, used by the functional simulation only so far
     */
-   const struct memory_config * getMemoryConfig();
+   const memory_config * getMemoryConfig();
    
    
    //! Get shader core SIMT cluster
@@ -496,6 +519,8 @@ public:
     */
     simt_core_cluster * getSIMTCluster();
 
+    void hit_watchpoint( unsigned watchpoint_num, ptx_thread_info *thd, const ptx_instruction *pI );
+
     // backward pointer
     class gpgpu_context* gpgpu_ctx;
 
@@ -545,7 +570,7 @@ private:
   
    const struct cudaDeviceProp     *m_cuda_properties;
    const shader_core_config *m_shader_config;
-   const struct memory_config      *m_memory_config;
+   const memory_config      *m_memory_config;
 
    // stats
    class shader_core_stats  *m_shader_stats;
@@ -560,6 +585,8 @@ private:
 
    std::vector<std::string> m_executed_kernel_names; //< names of kernel for stat printout 
    std::vector<unsigned> m_executed_kernel_uids; //< uids of kernel launches for stat printout
+   std::map<unsigned,watchpoint_event> g_watchpoint_hits;
+
    std::string executed_kernel_info_string(); //< format the kernel information into a string for stat printout
    void clear_executed_kernel_info(); //< clear the kernel information after stat printout
 
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 62e70a7..6540b52 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -49,7 +49,7 @@
 mem_fetch * partition_mf_allocator::alloc(new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const
 {
     assert( wr );
-    mem_access_t access( type, addr, size, wr );
+    mem_access_t access( type, addr, size, wr, m_memory_config->gpgpu_ctx );
     mem_fetch *mf = new mem_fetch( access, 
                                    NULL,
                                    WRITE_PACKET_SIZE, 
@@ -62,7 +62,7 @@ mem_fetch * partition_mf_allocator::alloc(new_addr_type addr, mem_access_type ty
 }
 
 memory_partition_unit::memory_partition_unit( unsigned partition_id, 
-                                              const struct memory_config *config,
+                                              const memory_config *config,
                                               class memory_stats_t *stats,
 											  class gpgpu_sim* gpu)
 : m_id(partition_id), m_config(config), m_stats(stats), m_arbitration_metadata(config), m_gpu(gpu)
@@ -95,7 +95,7 @@ memory_partition_unit::~memory_partition_unit()
     delete[] m_sub_partition; 
 }
 
-memory_partition_unit::arbitration_metadata::arbitration_metadata(const struct memory_config *config) 
+memory_partition_unit::arbitration_metadata::arbitration_metadata(const memory_config *config)
 : m_last_borrower(config->m_n_sub_partition_per_memory_channel - 1), 
   m_private_credit(config->m_n_sub_partition_per_memory_channel, 0), 
   m_shared_credit(0) 
@@ -312,7 +312,7 @@ void memory_partition_unit::print( FILE *fp ) const
 }
 
 memory_sub_partition::memory_sub_partition( unsigned sub_partition_id, 
-                                            const struct memory_config *config,
+                                            const memory_config *config,
                                             class memory_stats_t *stats,
 											class gpgpu_sim* gpu)
 {
@@ -640,7 +640,8 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
 									mf->is_write(),
 									mf->get_access_warp_mask(),
 									mf->get_access_byte_mask() & byte_sector_mask,
-									std::bitset<SECTOR_CHUNCK_SIZE>().set(j));
+									std::bitset<SECTOR_CHUNCK_SIZE>().set(j),
+									m_gpu->gpgpu_ctx);
 
 			 mem_fetch *n_mf = new mem_fetch( *ma,
 								NULL,
diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h
index 8ff2666..1f74c47 100644
--- a/src/gpgpu-sim/l2cache.h
+++ b/src/gpgpu-sim/l2cache.h
@@ -58,7 +58,7 @@ private:
 class memory_partition_unit
 {
 public: 
-   memory_partition_unit( unsigned partition_id, const struct memory_config *config, class memory_stats_t *stats, class gpgpu_sim* gpu );
+   memory_partition_unit( unsigned partition_id, const memory_config *config, class memory_stats_t *stats, class gpgpu_sim* gpu );
    ~memory_partition_unit(); 
 
    bool busy() const;
@@ -98,7 +98,7 @@ public:
 private: 
 
    unsigned m_id;
-   const struct memory_config *m_config;
+   const memory_config *m_config;
    class memory_stats_t *m_stats;
    class memory_sub_partition **m_sub_partition; 
    class dram_t *m_dram;
@@ -106,7 +106,7 @@ private:
    class arbitration_metadata
    {
    public: 
-      arbitration_metadata(const struct memory_config *config); 
+      arbitration_metadata(const memory_config *config);
 
       // check if a subpartition still has credit 
       bool has_credits(int inner_sub_partition_id) const; 
@@ -130,7 +130,7 @@ private:
       std::vector<int> m_private_credit; 
       int m_shared_credit; 
    }; 
-   arbitration_metadata m_arbitration_metadata; 
+   arbitration_metadata m_arbitration_metadata;
 
    // determine wheither a given subpartition can issue to DRAM 
    bool can_issue_to_dram(int inner_sub_partition_id); 
@@ -149,7 +149,7 @@ private:
 class memory_sub_partition
 {
 public:
-   memory_sub_partition( unsigned sub_partition_id, const struct memory_config *config, class memory_stats_t *stats, class gpgpu_sim* gpu );
+   memory_sub_partition( unsigned sub_partition_id, const memory_config *config, class memory_stats_t *stats, class gpgpu_sim* gpu );
    ~memory_sub_partition(); 
 
    unsigned get_id() const { return m_id; } 
@@ -197,7 +197,7 @@ public:
 private:
 // data
    unsigned m_id;  //< the global sub partition ID
-   const struct memory_config *m_config;
+   const memory_config *m_config;
    class l2_cache *m_L2cache;
    class L2interface *m_L2interface;
    class gpgpu_sim* m_gpu;
diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc
index c9b0484..6a00889 100644
--- a/src/gpgpu-sim/mem_fetch.cc
+++ b/src/gpgpu-sim/mem_fetch.cc
@@ -39,10 +39,10 @@ mem_fetch::mem_fetch( const mem_access_t &access,
                       unsigned wid,
                       unsigned sid, 
                       unsigned tpc, 
-                      const struct memory_config *config,
+                      const memory_config *config,
 					  unsigned long long cycle,
 					  mem_fetch *m_original_mf,
-					  mem_fetch *m_original_wr_mf)
+					  mem_fetch *m_original_wr_mf):m_access(access)
 
 {
    m_request_uid = sm_next_mf_request_uid++;
diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h
index 4eb3a52..1cab9f2 100644
--- a/src/gpgpu-sim/mem_fetch.h
+++ b/src/gpgpu-sim/mem_fetch.h
@@ -47,6 +47,7 @@ enum mf_type {
 #undef MF_TUP
 #undef MF_TUP_END
 
+class memory_config;
 class mem_fetch {
 public:
     mem_fetch( const mem_access_t &access, 
@@ -55,7 +56,7 @@ public:
                unsigned wid,
                unsigned sid, 
                unsigned tpc, 
-               const struct memory_config *config,
+               const memory_config *config,
 			   unsigned long long cycle,
 			   mem_fetch *original_mf = NULL,
 			   mem_fetch *original_wr_mf = NULL);
@@ -149,7 +150,7 @@ private:
 
    static unsigned sm_next_mf_request_uid;
 
-   const struct memory_config *m_mem_config;
+   const memory_config *m_mem_config;
    unsigned icnt_flit_size;
 
    mem_fetch* original_mf;  //this pointer is set up when a request is divided into sector requests at L2 cache (if the req size > L2 sector size), so the pointer refers to the original request
diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc
index d08ba39..a1b43a8 100644
--- a/src/gpgpu-sim/mem_latency_stat.cc
+++ b/src/gpgpu-sim/mem_latency_stat.cc
@@ -41,8 +41,9 @@
 #include <string.h>
 #include <stdlib.h>
 #include <stdio.h>
+#include "../../libcuda/gpgpu_context.h"
 
-memory_stats_t::memory_stats_t( unsigned n_shader, const shader_core_config *shader_config, const struct memory_config *mem_config, const class gpgpu_sim* gpu )
+memory_stats_t::memory_stats_t( unsigned n_shader, const shader_core_config *shader_config, const memory_config *mem_config, const class gpgpu_sim* gpu )
 {
    assert( mem_config->m_valid );
    assert( shader_config->m_valid );
@@ -195,7 +196,7 @@ void memory_stats_t::memlatstat_dram_access(mem_fetch *mf)
       mem_access_type_stats[mf->get_access_type()][dram_id][bank]++;
    }
    if (mf->get_pc() != (unsigned)-1) 
-      ptx_file_line_stats_add_dram_traffic(mf->get_pc(), mf->get_data_size());
+      m_gpu->gpgpu_ctx->stats->ptx_file_line_stats_add_dram_traffic(mf->get_pc(), mf->get_data_size());
 }
 
 void memory_stats_t::memlatstat_icnt2mem_pop(mem_fetch *mf)
diff --git a/src/gpgpu-sim/mem_latency_stat.h b/src/gpgpu-sim/mem_latency_stat.h
index 6ce568d..0c84972 100644
--- a/src/gpgpu-sim/mem_latency_stat.h
+++ b/src/gpgpu-sim/mem_latency_stat.h
@@ -32,11 +32,12 @@
 #include <zlib.h>
 #include <map>
 
+class memory_config;
 class memory_stats_t {
 public:
    memory_stats_t( unsigned n_shader, 
                    const class shader_core_config *shader_config, 
-                   const struct memory_config *mem_config,
+                   const memory_config *mem_config,
 				   const class gpgpu_sim* gpu);
 
    unsigned memlatstat_done( class mem_fetch *mf );
@@ -54,7 +55,7 @@ public:
    unsigned m_n_shader;
 
    const shader_core_config *m_shader_config;
-   const struct memory_config *m_memory_config;
+   const memory_config *m_memory_config;
    const class gpgpu_sim* m_gpu;
 
    unsigned max_mrq_latency;
diff --git a/src/gpgpu-sim/power_stat.cc b/src/gpgpu-sim/power_stat.cc
index 007b4c6..2c02082 100644
--- a/src/gpgpu-sim/power_stat.cc
+++ b/src/gpgpu-sim/power_stat.cc
@@ -42,7 +42,7 @@
 
 
 
-power_mem_stat_t::power_mem_stat_t(const struct memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats){
+power_mem_stat_t::power_mem_stat_t(const memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats){
 	   assert( mem_config->m_valid );
 	   m_mem_stats = mem_stats;
 	   m_config = mem_config;
@@ -266,7 +266,7 @@ for(unsigned i=0; i<m_config->num_shader(); ++i){
     }
 }
 
-power_stat_t::power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float *active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats)
+power_stat_t::power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float *active_sms,shader_core_stats * shader_stats, const memory_config *mem_config,memory_stats_t * memory_stats)
 {
 	assert( shader_config->m_valid );
 	assert( mem_config->m_valid );
diff --git a/src/gpgpu-sim/power_stat.h b/src/gpgpu-sim/power_stat.h
index 91fade9..24ade99 100644
--- a/src/gpgpu-sim/power_stat.h
+++ b/src/gpgpu-sim/power_stat.h
@@ -113,7 +113,7 @@ struct mem_power_stats_pod{
 
 class power_mem_stat_t : public mem_power_stats_pod{
 public:
-   power_mem_stat_t(const struct memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats);
+   power_mem_stat_t(const memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats);
    void visualizer_print( gzFile visualizer_file );
    void print (FILE *fout) const;
    void init();
@@ -128,7 +128,7 @@ private:
 
 class power_stat_t {
 public:
-   power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float * active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats);
+   power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float * active_sms,shader_core_stats * shader_stats, const memory_config *mem_config,memory_stats_t * memory_stats);
    void visualizer_print( gzFile visualizer_file );
    void print (FILE *fout) const;
    void save_stats(){
@@ -621,7 +621,7 @@ public:
    float * m_average_pipeline_duty_cycle;
    float * m_active_sms;
    const shader_core_config *m_config;
-   const struct memory_config *m_mem_config;
+   const memory_config *m_mem_config;
 };
 
 
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index f380560..c697450 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -28,7 +28,6 @@
 
 #include <float.h>
 #include "shader.h"
-#include "gpu-sim.h"
 #include "addrdec.h"
 #include "dram.h"
 #include "stat-tool.h"
@@ -53,6 +52,19 @@
 #define MIN(a,b) (((a)<(b))?(a):(b))
     
 
+mem_fetch *shader_core_mem_fetch_allocator::alloc( new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const
+{
+    mem_access_t access( type, addr, size, wr, m_memory_config->gpgpu_ctx);
+    mem_fetch *mf = new mem_fetch( access, 
+	    NULL,
+	    wr?WRITE_PACKET_SIZE:READ_PACKET_SIZE, 
+	    -1, 
+	    m_core_id, 
+	    m_cluster_id,
+	    m_memory_config,
+	    cycle);
+    return mf;
+}
 /////////////////////////////////////////////////////////////////////////////
 
 std::list<unsigned> shader_core_ctx::get_regs_written( const inst_t &fvt ) const
@@ -71,7 +83,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
                                   unsigned shader_id,
                                   unsigned tpc_id,
                                   const shader_core_config *config,
-                                  const struct memory_config *mem_config,
+                                  const memory_config *mem_config,
                                   shader_core_stats *stats )
    : core_t( gpu, NULL, config->warp_size, config->n_thread_per_shader ),
      m_barriers( this, config->max_warps_per_shader, config->max_cta_per_core, config->max_barriers_per_cta, config->warp_size ),
@@ -732,7 +744,7 @@ void shader_core_ctx::decode()
     if( m_inst_fetch_buffer.m_valid ) {
         // decode 1 or 2 instructions and place them into ibuffer
         address_type pc = m_inst_fetch_buffer.m_pc;
-        const warp_inst_t* pI1 = ptx_fetch_inst(pc);
+        const warp_inst_t* pI1 = m_gpu->gpgpu_ctx->ptx_fetch_inst(pc);
         m_warp[m_inst_fetch_buffer.m_warp_id].ibuffer_fill(0,pI1);
         m_warp[m_inst_fetch_buffer.m_warp_id].inc_inst_in_pipeline();
         if( pI1 ) {
@@ -742,7 +754,7 @@ void shader_core_ctx::decode()
             }else if(pI1->oprnd_type==FP_OP) {
             	m_stats->m_num_FPdecoded_insn[m_sid]++;
             }
-           const warp_inst_t* pI2 = ptx_fetch_inst(pc+pI1->isize);
+           const warp_inst_t* pI2 = m_gpu->gpgpu_ctx->ptx_fetch_inst(pc+pI1->isize);
            if( pI2 ) {
                m_warp[m_inst_fetch_buffer.m_warp_id].ibuffer_fill(1,pI2);
                m_warp[m_inst_fetch_buffer.m_warp_id].inc_inst_in_pipeline();
@@ -809,7 +821,7 @@ void shader_core_ctx::fetch()
 
                     // TODO: replace with use of allocator
                     // mem_fetch *mf = m_mem_fetch_allocator->alloc()
-                    mem_access_t acc(INST_ACC_R,ppc,nbytes,false);
+                    mem_access_t acc(INST_ACC_R,ppc,nbytes,false, m_gpu->gpgpu_ctx);
                     mem_fetch *mf = new mem_fetch(acc,
                             NULL/*we don't have an instruction yet*/,
                             READ_PACKET_SIZE,
@@ -3787,7 +3799,7 @@ void opndcoll_rfu_t::collector_unit_t::dispatch()
 simt_core_cluster::simt_core_cluster( class gpgpu_sim *gpu, 
                                       unsigned cluster_id, 
                                       const shader_core_config *config, 
-                                      const struct memory_config *mem_config,
+                                      const memory_config *mem_config,
                                       shader_core_stats *stats, 
                                       class memory_stats_t *mstats )
 {
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 2837f1b..b0d7f7f 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1727,6 +1727,7 @@ private:
     friend class LooseRoundRobbinScheduler;
 };
 
+class memory_config;
 class shader_core_mem_fetch_allocator : public mem_fetch_allocator {
 public:
     shader_core_mem_fetch_allocator( unsigned core_id, unsigned cluster_id, const memory_config *config )
@@ -1735,20 +1736,7 @@ public:
     	m_cluster_id = cluster_id;
     	m_memory_config = config;
     }
-    mem_fetch *alloc( new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const
-    {
-    	mem_access_t access( type, addr, size, wr );
-    	mem_fetch *mf = new mem_fetch( access, 
-    				       NULL,
-    				       wr?WRITE_PACKET_SIZE:READ_PACKET_SIZE, 
-    				       -1, 
-    				       m_core_id, 
-    				       m_cluster_id,
-    				       m_memory_config,
-						   cycle);
-    	return mf;
-    }
-    
+    mem_fetch *alloc( new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const; 
     mem_fetch *alloc( const warp_inst_t &inst, const mem_access_t &access, unsigned long long cycle ) const
     {
         warp_inst_t inst_copy = inst;
@@ -1777,7 +1765,7 @@ public:
                      unsigned shader_id,
                      unsigned tpc_id,
                      const shader_core_config *config,
-                     const struct memory_config *mem_config,
+                     const memory_config *mem_config,
                      shader_core_stats *stats );
 
 // used by simt_core_cluster:
@@ -2072,7 +2060,7 @@ public:
     simt_core_cluster( class gpgpu_sim *gpu, 
                        unsigned cluster_id, 
                        const shader_core_config *config, 
-                       const struct memory_config *mem_config,
+                       const memory_config *mem_config,
                        shader_core_stats *stats,
                        memory_stats_t *mstats );
 
diff --git a/src/gpgpu-sim/stat-tool.cc b/src/gpgpu-sim/stat-tool.cc
index 6a4c75b..35a4cc3 100644
--- a/src/gpgpu-sim/stat-tool.cc
+++ b/src/gpgpu-sim/stat-tool.cc
@@ -37,6 +37,7 @@
 #include <map>
 #include <algorithm>
 #include <string>
+#include "../../libcuda/gpgpu_context.h"
 
 ////////////////////////////////////////////////////////////////////////////////
 
@@ -110,12 +111,10 @@ void spill_log_to_file (FILE *fout, int final, unsigned long long  current_cycle
 
 ////////////////////////////////////////////////////////////////////////////////
 
-unsigned translate_pc_to_ptxlineno(unsigned pc);
-
 static int n_thread_CFloggers = 0;
 static thread_CFlocality** thread_CFlogger = NULL;
 
-void create_thread_CFlogger( int n_loggers, int n_threads, address_type start_pc, unsigned long long  logging_interval) 
+void create_thread_CFlogger(gpgpu_context* ctx, int n_loggers, int n_threads, address_type start_pc, unsigned long long  logging_interval) 
 {
    destroy_thread_CFlogger();
    
@@ -126,7 +125,7 @@ void create_thread_CFlogger( int n_loggers, int n_threads, address_type start_pc
    char buffer[32];
    for (int i = 0; i < n_thread_CFloggers; i++) {
       snprintf(buffer, 32, "%02d", i);
-      thread_CFlogger[i] = new thread_CFlocality( name_tpl + buffer, logging_interval, n_threads, start_pc);
+      thread_CFlogger[i] = new thread_CFlocality( ctx, name_tpl + buffer, logging_interval, n_threads, start_pc);
       if (logging_interval != 0) {
          add_snap_shot_trigger(thread_CFlogger[i]);
          add_spill_log(thread_CFlogger[i]);
@@ -368,10 +367,10 @@ static int s_cache_access_logger_n_types = 0;
 static std::vector<linear_histogram_logger> s_cache_access_logger;
 
 enum cache_access_logger_types {
-   NORMAL, TEXTURE, CONSTANT, INSTRUCTION
+   NORMALS, TEXTURE, CONSTANT, INSTRUCTION
 };
 
-int get_shader_normal_cache_id() { return NORMAL; }
+int get_shader_normal_cache_id() { return NORMALS; }
 int get_shader_texture_cache_id() { return TEXTURE; }
 int get_shader_constant_cache_id() { return CONSTANT; }
 int get_shader_instruction_cache_id() { return INSTRUCTION; }
@@ -394,7 +393,7 @@ void shader_cache_access_log( int logger_id, int type, int miss)
 {
    if (s_cache_access_logger_n_types == 0) return;
    if (logger_id < 0) return;
-   assert(type == NORMAL || type == TEXTURE || type == CONSTANT || type == INSTRUCTION);
+   assert(type == NORMALS || type == TEXTURE || type == CONSTANT || type == INSTRUCTION);
    assert(miss == 0 || miss == 1);
    
    s_cache_access_logger[logger_id].log(2 * type + miss);
@@ -404,7 +403,7 @@ void shader_cache_access_unlog( int logger_id, int type, int miss)
 {
    if (s_cache_access_logger_n_types == 0) return;
    if (logger_id < 0) return;
-   assert(type == NORMAL || type == TEXTURE || type == CONSTANT || type == INSTRUCTION);
+   assert(type == NORMALS || type == TEXTURE || type == CONSTANT || type == INSTRUCTION);
    assert(miss == 0 || miss == 1);
    
    s_cache_access_logger[logger_id].unlog(2 * type + miss);
@@ -477,22 +476,24 @@ void shader_CTA_count_visualizer_gzprint( gzFile fout )
 ////////////////////////////////////////////////////////////////////////////////
 ////////////////////////////////////////////////////////////////////////////////
 
-thread_insn_span::thread_insn_span(unsigned long long  cycle)
+thread_insn_span::thread_insn_span(unsigned long long  cycle, gpgpu_context* ctx)
   : m_cycle(cycle),
 #if (tr1_hash_map_ismap == 1)
      m_insn_span_count() 
 #else 
      m_insn_span_count(32*1024) 
 #endif
-{ 
+{
+    gpgpu_ctx = ctx;
 }
 
 thread_insn_span::~thread_insn_span() { }
    
-thread_insn_span::thread_insn_span(const thread_insn_span& other)
+thread_insn_span::thread_insn_span(const thread_insn_span& other, gpgpu_context* ctx)
       : m_cycle(other.m_cycle),
-        m_insn_span_count(other.m_insn_span_count) 
+        m_insn_span_count(other.m_insn_span_count)
 { 
+    gpgpu_ctx = ctx;
 }
       
 thread_insn_span& thread_insn_span::operator=(const thread_insn_span& other)
@@ -551,7 +552,7 @@ void thread_insn_span::print_sparse_histo(FILE *fout) const
    int n_printed_entries = 0;
    span_count_map::const_iterator i_sc = m_insn_span_count.begin();
    for (; i_sc != m_insn_span_count.end(); ++i_sc) {
-      unsigned ptx_lineno = translate_pc_to_ptxlineno(i_sc->first);
+      unsigned ptx_lineno = gpgpu_ctx->translate_pc_to_ptxlineno(i_sc->first);
       fprintf(fout, "%u %d ", ptx_lineno, i_sc->second);
       n_printed_entries++;
    }
@@ -566,7 +567,7 @@ void thread_insn_span::print_sparse_histo(gzFile fout) const
    int n_printed_entries = 0;
    span_count_map::const_iterator i_sc = m_insn_span_count.begin();
    for (; i_sc != m_insn_span_count.end(); ++i_sc) {
-      unsigned ptx_lineno = translate_pc_to_ptxlineno(i_sc->first);
+      unsigned ptx_lineno = gpgpu_ctx->translate_pc_to_ptxlineno(i_sc->first);
       gzprintf(fout, "%u %d ", ptx_lineno, i_sc->second);
       n_printed_entries++;
    }
@@ -578,14 +579,14 @@ void thread_insn_span::print_sparse_histo(gzFile fout) const
 
 ////////////////////////////////////////////////////////////////////////////////
 
-thread_CFlocality::thread_CFlocality(std::string name, 
+thread_CFlocality::thread_CFlocality( gpgpu_context* ctx, std::string name, 
                                      unsigned long long  snap_shot_interval, 
                                      int nthreads, 
                                      address_type start_pc, 
                                      unsigned long long  start_cycle)
       : snap_shot_trigger(snap_shot_interval), m_name(name),
         m_nthreads(nthreads), m_thread_pc(nthreads, start_pc), m_cycle(start_cycle),
-        m_thd_span(start_cycle)
+        m_thd_span(start_cycle, ctx)
 {
    std::fill(m_thread_pc.begin(), m_thread_pc.end(), -1); // so that hw thread with no work assigned will not clobber results
 }
diff --git a/src/gpgpu-sim/stat-tool.h b/src/gpgpu-sim/stat-tool.h
index 5646f01..67b3923 100644
--- a/src/gpgpu-sim/stat-tool.h
+++ b/src/gpgpu-sim/stat-tool.h
@@ -35,6 +35,7 @@
 #include <stdio.h>
 #include <zlib.h>
 
+class gpgpu_context;
 /////////////////////////////////////////////////////////////////////////////////////
 // logger snapshot trigger: 
 // - automate the snap_shot part of loggers to avoid modifying simulation loop everytime 
@@ -80,8 +81,8 @@ public:
 
 class thread_insn_span {
 public:
-   thread_insn_span(unsigned long long  cycle);
-   thread_insn_span(const thread_insn_span& other);
+   thread_insn_span(unsigned long long  cycle, gpgpu_context* ctx);
+   thread_insn_span(const thread_insn_span& other, gpgpu_context* ctx);
    ~thread_insn_span();
    
    thread_insn_span& operator=(const thread_insn_span& other);
@@ -94,7 +95,8 @@ public:
    void print_sparse_histo(FILE *fout) const;
    void print_sparse_histo(gzFile fout) const;
 
-private: 
+private:
+   gpgpu_context* gpgpu_ctx;
    typedef tr1_hash_map<address_type, int> span_count_map;
    unsigned long long  m_cycle;
    span_count_map m_insn_span_count;
@@ -102,7 +104,7 @@ private:
 
 class thread_CFlocality : public snap_shot_trigger, public spill_log_interface {
 public:
-   thread_CFlocality(std::string name, unsigned long long  snap_shot_interval, 
+   thread_CFlocality(gpgpu_context* ctx, std::string name, unsigned long long  snap_shot_interval, 
                      int nthreads, address_type start_pc, unsigned long long  start_cycle = 0);
    ~thread_CFlocality();
    
@@ -270,7 +272,7 @@ void try_snap_shot (unsigned long long  current_cycle);
 void set_spill_interval (unsigned long long  interval);
 void spill_log_to_file (FILE *fout, int final, unsigned long long  current_cycle);
 
-void create_thread_CFlogger( int n_loggers, int n_threads, address_type start_pc, unsigned long long  logging_interval);
+void create_thread_CFlogger(gpgpu_context* ctx,  int n_loggers, int n_threads, address_type start_pc, unsigned long long  logging_interval);
 void destroy_thread_CFlogger( );
 void cflog_update_thread_pc( int logger_id, int thread_id, address_type pc );
 void cflog_snapshot( int logger_id, unsigned long long  cycle );