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authormkhairy <[email protected]>2021-05-21 17:57:43 -0400
committerGitHub <[email protected]>2021-05-21 17:57:43 -0400
commitce4f20f308eaeccfeb706201e02a7d97b3d33efa (patch)
treedca4d006b62d2d3b1d583bdbc8a270c076396bac
parent2aef4e3d5a662d04da03ec782b116d16a5bcc012 (diff)
parentb814c52fe9c4538669d845c5f05b247348f6fd1d (diff)
Merge pull request #17 from JRPan/rewrite-l2-breakdown
Rewrite l2 breakdown
-rw-r--r--src/abstract_hardware_model.h4
-rw-r--r--src/gpgpu-sim/gpu-cache.cc12
-rw-r--r--src/gpgpu-sim/gpu-cache.h4
-rw-r--r--src/gpgpu-sim/l2cache.cc56
-rw-r--r--src/gpgpu-sim/l2cache.h4
-rw-r--r--src/gpgpu-sim/shader.cc19
-rw-r--r--src/gpgpu-sim/shader.h4
7 files changed, 48 insertions, 55 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index b33c50b..60d7328 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -876,7 +876,9 @@ class mem_fetch_allocator {
const mem_access_byte_mask_t &byte_mask,
const mem_access_sector_mask_t &sector_mask,
unsigned size, bool wr,
- unsigned long long cycle) const = 0;
+ unsigned long long cycle,
+ unsigned wid, unsigned sid,
+ unsigned tpc, mem_fetch *original_mf) const = 0;
};
// the maximum number of destination, source, or address uarch operands in a
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 297a94c..7e7d2ad 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -282,7 +282,7 @@ enum cache_request_status tag_array::probe(new_addr_type addr, unsigned &idx,
// percentage of dirty lines in the cache
// number of dirty lines / total lines in the cache
float dirty_line_percentage =
- (float) (m_dirty / (m_config.m_nset * m_config.m_assoc )) * 100;
+ ((float) m_dirty / (m_config.m_nset * m_config.m_assoc )) * 100;
if (!line->is_modified_line() ||
dirty_line_percentage >= m_config.m_wr_percent) {
// if number of dirty lines in the cache is greater than
@@ -1338,7 +1338,7 @@ enum cache_request_status data_cache::wr_miss_wa_naive(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1391,7 +1391,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1464,7 +1464,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1549,7 +1549,7 @@ enum cache_request_status data_cache::wr_miss_wa_lazy_fetch_on_read(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1631,7 +1631,7 @@ enum cache_request_status data_cache::rd_miss_base(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 6698d92..007403f 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -563,10 +563,10 @@ class cache_config {
char ct, rp, wp, ap, mshr_type, wap, sif;
int ntok =
- sscanf(config, "%c:%u:%u:%u,%c:%c:%c:%c:%c,%c:%u:%u,%u:%u,%u,%u", &ct,
+ sscanf(config, "%c:%u:%u:%u,%c:%c:%c:%c:%c,%c:%u:%u,%u:%u,%u", &ct,
&m_nset, &m_line_sz, &m_assoc, &rp, &wp, &ap, &wap, &sif,
&mshr_type, &m_mshr_entries, &m_mshr_max_merge,
- &m_miss_queue_size, &m_result_fifo_entries, &m_data_port_width, &m_wr_percent);
+ &m_miss_queue_size, &m_result_fifo_entries, &m_data_port_width);
if (ntok < 12) {
if (!strcmp(config, "none")) {
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 00b14d7..0db6bd4 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -57,18 +57,19 @@ mem_fetch *partition_mf_allocator::alloc(new_addr_type addr,
return mf;
}
-mem_fetch *partition_mf_allocator::alloc(new_addr_type addr,
- mem_access_type type,
+mem_fetch *partition_mf_allocator::alloc(new_addr_type addr, mem_access_type type,
const active_mask_t &active_mask,
const mem_access_byte_mask_t &byte_mask,
const mem_access_sector_mask_t &sector_mask,
unsigned size, bool wr,
- unsigned long long cycle) const {
+ unsigned long long cycle,
+ unsigned wid, unsigned sid,
+ unsigned tpc, mem_fetch *original_mf) const {
mem_access_t access(type, addr, size, wr, active_mask, byte_mask,
sector_mask, m_memory_config->gpgpu_ctx);
mem_fetch *mf =
- new mem_fetch(access, NULL, wr ? WRITE_PACKET_SIZE : READ_PACKET_SIZE, -1,
- -1, -1, m_memory_config, cycle);
+ new mem_fetch(access, NULL, wr ? WRITE_PACKET_SIZE : READ_PACKET_SIZE, wid,
+ sid, tpc, m_memory_config, cycle,original_mf);
return mf;
}
memory_partition_unit::memory_partition_unit(unsigned partition_id,
@@ -724,16 +725,11 @@ memory_sub_partition::breakdown_request_to_sector_requests(mem_fetch *mf) {
for (unsigned k = i * SECTOR_SIZE; k < (i + 1) * SECTOR_SIZE; k++) {
mask.set(k);
}
- const mem_access_t *ma = new mem_access_t(
- mf->get_access_type(), mf->get_addr() + SECTOR_SIZE * i, SECTOR_SIZE,
- mf->is_write(), mf->get_access_warp_mask(),
- mf->get_access_byte_mask() & mask,
- std::bitset<SECTOR_CHUNCK_SIZE>().set(i), m_gpu->gpgpu_ctx);
-
- mem_fetch *n_mf =
- new mem_fetch(*ma, NULL, mf->get_ctrl_size(), mf->get_wid(),
- mf->get_sid(), mf->get_tpc(), mf->get_mem_config(),
- m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle, mf);
+ mem_fetch *n_mf = m_mf_allocator->alloc(mf->get_addr() + SECTOR_SIZE * i,
+ mf->get_access_type(),mf->get_access_warp_mask(),
+ mf->get_access_byte_mask() & mask,std::bitset<SECTOR_CHUNCK_SIZE>().set(i),
+ SECTOR_SIZE,mf->is_write(),m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,
+ mf->get_wid(),mf->get_sid(), mf->get_tpc(),mf);
result.push_back(n_mf);
}
@@ -750,16 +746,11 @@ memory_sub_partition::breakdown_request_to_sector_requests(mem_fetch *mf) {
for (unsigned k = i * SECTOR_SIZE; k < (i + 1) * SECTOR_SIZE; k++) {
mask.set(k);
}
- const mem_access_t *ma = new mem_access_t(
- mf->get_access_type(), mf->get_addr(), SECTOR_SIZE,
- mf->is_write(), mf->get_access_warp_mask(),
- mf->get_access_byte_mask() & mask,
- std::bitset<SECTOR_CHUNCK_SIZE>().set(i), m_gpu->gpgpu_ctx);
-
- mem_fetch *n_mf =
- new mem_fetch(*ma, NULL, mf->get_ctrl_size(), mf->get_wid(),
- mf->get_sid(), mf->get_tpc(), mf->get_mem_config(),
- m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle, mf);
+ mem_fetch *n_mf = m_mf_allocator->alloc(mf->get_addr(),
+ mf->get_access_type(),mf->get_access_warp_mask(),
+ mf->get_access_byte_mask() & mask,std::bitset<SECTOR_CHUNCK_SIZE>().set(i),
+ SECTOR_SIZE,mf->is_write(),m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,
+ mf->get_wid(),mf->get_sid(), mf->get_tpc(),mf);
result.push_back(n_mf);
}
@@ -770,16 +761,11 @@ memory_sub_partition::breakdown_request_to_sector_requests(mem_fetch *mf) {
for (unsigned k = i * SECTOR_SIZE; k < (i + 1) * SECTOR_SIZE; k++) {
mask.set(k);
}
- const mem_access_t *ma = new mem_access_t(
- mf->get_access_type(), mf->get_addr() + SECTOR_SIZE * i,
- SECTOR_SIZE, mf->is_write(), mf->get_access_warp_mask(),
- mf->get_access_byte_mask() & mask,
- std::bitset<SECTOR_CHUNCK_SIZE>().set(i), m_gpu->gpgpu_ctx);
-
- mem_fetch *n_mf =
- new mem_fetch(*ma, NULL, mf->get_ctrl_size(), mf->get_wid(),
- mf->get_sid(), mf->get_tpc(), mf->get_mem_config(),
- m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle, mf);
+ mem_fetch *n_mf = m_mf_allocator->alloc(mf->get_addr() + SECTOR_SIZE * i,
+ mf->get_access_type(),mf->get_access_warp_mask(),
+ mf->get_access_byte_mask() & mask,std::bitset<SECTOR_CHUNCK_SIZE>().set(i),
+ SECTOR_SIZE,mf->is_write(),m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,
+ mf->get_wid(),mf->get_sid(), mf->get_tpc(),mf);
result.push_back(n_mf);
}
diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h
index 1f5d7c4..59432b8 100644
--- a/src/gpgpu-sim/l2cache.h
+++ b/src/gpgpu-sim/l2cache.h
@@ -56,7 +56,9 @@ class partition_mf_allocator : public mem_fetch_allocator {
const mem_access_byte_mask_t &byte_mask,
const mem_access_sector_mask_t &sector_mask,
unsigned size, bool wr,
- unsigned long long cycle) const;
+ unsigned long long cycle,
+ unsigned wid, unsigned sid,
+ unsigned tpc, mem_fetch *original_mf) const;
private:
const memory_config *m_memory_config;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 7f27b7b..51366de 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -62,18 +62,19 @@ mem_fetch *shader_core_mem_fetch_allocator::alloc(
return mf;
}
-mem_fetch *shader_core_mem_fetch_allocator::alloc(
- new_addr_type addr, mem_access_type type,
- const active_mask_t &active_mask,
- const mem_access_byte_mask_t &byte_mask,
- const mem_access_sector_mask_t &sector_mask,
- unsigned size, bool wr,
- unsigned long long cycle) const {
+mem_fetch *shader_core_mem_fetch_allocator::alloc(new_addr_type addr, mem_access_type type,
+ const active_mask_t &active_mask,
+ const mem_access_byte_mask_t &byte_mask,
+ const mem_access_sector_mask_t &sector_mask,
+ unsigned size, bool wr,
+ unsigned long long cycle,
+ unsigned wid, unsigned sid,
+ unsigned tpc, mem_fetch *original_mf) const {
mem_access_t access(type, addr, size, wr, active_mask, byte_mask,
sector_mask, m_memory_config->gpgpu_ctx);
mem_fetch *mf =
- new mem_fetch(access, NULL, wr ? WRITE_PACKET_SIZE : READ_PACKET_SIZE, -1,
- m_core_id, m_cluster_id, m_memory_config, cycle);
+ new mem_fetch(access, NULL, wr ? WRITE_PACKET_SIZE : READ_PACKET_SIZE, wid,
+ m_core_id, m_cluster_id, m_memory_config, cycle,original_mf);
return mf;
}
/////////////////////////////////////////////////////////////////////////////
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 42bbdcb..8662313 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1903,7 +1903,9 @@ class shader_core_mem_fetch_allocator : public mem_fetch_allocator {
const mem_access_byte_mask_t &byte_mask,
const mem_access_sector_mask_t &sector_mask,
unsigned size, bool wr,
- unsigned long long cycle) const;
+ unsigned long long cycle,
+ unsigned wid, unsigned sid,
+ unsigned tpc, mem_fetch *original_mf) const;
mem_fetch *alloc(const warp_inst_t &inst, const mem_access_t &access,
unsigned long long cycle) const {
warp_inst_t inst_copy = inst;