Fixing texture fetching for 1D texture with non-normalized coordinates: Adding support for the floating point input coordinate, and handling of out-of-bound coordinates.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13959]

3 files changed, 24 insertions, 3 deletions

diff --git a/CHANGES b/CHANGES
index 52017bf..2bbc5ca 100644
--- a/CHANGES
+++ b/CHANGES
@@ -27,7 +27,8 @@ Version 3.1.1+edits (development branch) versus 3.1.1
       are counted into gpu_sim_insn regardless of predication outcome.  (Bug
       #15 external)
     - Added support for cudaReadModeNormalizedFloat (a texture read mode). 
-    - Fixed mult-element texel access (e.g. texel with RGBA components).  
+    - Fixed texture fetching for 1D texture with non-normalized coordinates. 
+    - Fixed mult-element texel fetching (e.g. texel with RGBA components).  
 
 Version 3.1.1 versus 3.1.0
 - Add checks to top level makefile to ensure setup_environment is run and checks to
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index b6a4111..8a08501 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -312,7 +312,7 @@ enum cudaTextureReadMode {
 struct textureReference {
    int                           normalized;
    enum cudaTextureFilterMode    filterMode;
-   enum cudaTextureAddressMode   addressMode[2];
+   enum cudaTextureAddressMode   addressMode[3];
    struct cudaChannelFormatDesc  channelDesc;
 };
 
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index e91ddd4..1c3bf4f 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -3695,6 +3695,7 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
 
    std::string texname = src1.name();
    unsigned to_type = pI->get_type();
+   unsigned c_type = pI->get_type2();
    fflush(stdout);
    ptx_reg_t data1, data2, data3, data4;
    if (!ptx_tex_regs) ptx_tex_regs = new ptx_reg_t[4];
@@ -3728,6 +3729,7 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
       width = cuArray->width;
       height = cuArray->height;
       if (texref->normalized) {
+         assert(c_type == F32_TYPE); 
          x_f32 = ptx_tex_regs[0].f32;
          if (texref->addressMode[0] == cudaAddressModeClamp) {
             x_f32 = (x_f32 > 1.0)? 1.0 : x_f32;
@@ -3749,7 +3751,25 @@ void tex_impl( const ptx_instruction *pI, ptx_thread_info *thread )
             y = 0;
          }
       } else {
-         x = ptx_tex_regs[0].u64;
+         switch ( c_type ) {
+         case S32_TYPE: 
+            x = ptx_tex_regs[0].s32; 
+            assert(texref->filterMode == cudaFilterModePoint); 
+            break; 
+         case F32_TYPE: 
+            x_f32 = ptx_tex_regs[0].f32; 
+            alpha = x_f32 - floor(x_f32); // offset into subtexel (for linear sampling)
+            x = (int) x_f32; 
+            break; 
+         default: assert(0 && "Unsupported texture coordinate type."); 
+         }
+         // handle texture fetch that exceeded boundaries
+         if (texref->addressMode[0] == cudaAddressModeClamp) {
+            x = (x > width - 1)? (width - 1) : x;
+            x = (x < 0)? 0 : x;
+         } else if (texref->addressMode[0] == cudaAddressModeWrap) {
+            x = x % width;
+         }
       }
       width *= (cuArray->desc.w+cuArray->desc.x+cuArray->desc.y+cuArray->desc.z)/8;
       x *= (cuArray->desc.w+cuArray->desc.x+cuArray->desc.y+cuArray->desc.z)/8;