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authorWilliamMTK <[email protected]>2023-05-16 21:35:30 -0700
committerGitHub <[email protected]>2023-05-16 21:35:30 -0700
commite033c1f2dd7019ffe2733e24c096ad0dbc0d2299 (patch)
tree7b9492c5b5825ab1aa2fccdbaaa13d6c529e35e9
parent6dd3bfccf630d847917dc4d2608008f314fa43b4 (diff)
parent363ff9dcd3e10cdcf8a7dbe71d1f22bc2e24c4a2 (diff)
Merge pull request #49 from accel-sim/fix-issue-accel-sim-187
Fix typos in accel sim issue 187
-rw-r--r--src/gpgpu-sim/gpu-cache.cc10
-rw-r--r--src/gpgpu-sim/mem_fetch.h2
2 files changed, 6 insertions, 6 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index b3105ae..f4448d3 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -1380,7 +1380,7 @@ enum cache_request_status data_cache::wr_miss_wa_naive(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1433,7 +1433,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1506,7 +1506,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1573,7 +1573,7 @@ enum cache_request_status data_cache::wr_miss_wa_lazy_fetch_on_read(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1655,7 +1655,7 @@ enum cache_request_status data_cache::rd_miss_base(
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
- wb->set_parition(mf->get_tlx_addr().sub_partition);
+ wb->set_partition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, WRITE_BACK_REQUEST_SENT, time, events);
}
return MISS;
diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h
index e039846..283fe80 100644
--- a/src/gpgpu-sim/mem_fetch.h
+++ b/src/gpgpu-sim/mem_fetch.h
@@ -77,7 +77,7 @@ class mem_fetch {
const addrdec_t &get_tlx_addr() const { return m_raw_addr; }
void set_chip(unsigned chip_id) { m_raw_addr.chip = chip_id; }
- void set_parition(unsigned sub_partition_id) {
+ void set_partition(unsigned sub_partition_id) {
m_raw_addr.sub_partition = sub_partition_id;
}
unsigned get_data_size() const { return m_data_size; }