diff options
| author | Mengchi Zhang <[email protected]> | 2019-07-10 16:09:54 -0400 |
|---|---|---|
| committer | Mengchi Zhang <[email protected]> | 2019-07-10 16:09:54 -0400 |
| commit | e83a9c978ebd08eed616eb6fdbdef88160232076 (patch) | |
| tree | 46a10f1a45c6dd770384dabf37a09e52551a3b25 | |
| parent | 57f8e9bd4e73757f4026e8b257fb625d465e0271 (diff) | |
Move cdp_latency
Signed-off-by: Mengchi Zhang <[email protected]>
| -rw-r--r-- | src/cuda-sim/cuda-sim.cc | 8 | ||||
| -rw-r--r-- | src/cuda-sim/cuda-sim.h | 1 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 7 |
3 files changed, 9 insertions, 7 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index b370400..bd96f7e 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -58,7 +58,6 @@ int g_debug_thread_uid = 0; addr_t g_debug_pc = 0xBEEF1518; // Output debug information to file options -unsigned cdp_latency[5]; void cuda_sim::ptx_opcocde_latency_options (option_parser_t opp) { option_parser_register(opp, "-ptx_opcode_latency_int", OPT_CSTR, &opcode_latency_int, @@ -680,8 +679,11 @@ void ptx_instruction::set_opcode_and_latency() sscanf(gpgpu_ctx->func_sim->opcode_initiation_tensor, "%u", &tensor_init); sscanf(gpgpu_ctx->func_sim->cdp_latency_str, "%u,%u,%u,%u,%u", - &cdp_latency[0],&cdp_latency[1],&cdp_latency[2], - &cdp_latency[3],&cdp_latency[4]); + &gpgpu_ctx->func_sim->cdp_latency[0], + &gpgpu_ctx->func_sim->cdp_latency[1], + &gpgpu_ctx->func_sim->cdp_latency[2], + &gpgpu_ctx->func_sim->cdp_latency[3], + &gpgpu_ctx->func_sim->cdp_latency[4]); if(!m_operands.empty()){ std::vector<operand_info>::iterator it; diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h index 89f67cf..0b6e84f 100644 --- a/src/cuda-sim/cuda-sim.h +++ b/src/cuda-sim/cuda-sim.h @@ -163,6 +163,7 @@ class cuda_sim { std::map<unsigned,function_info*> g_pc_to_finfo; int gpgpu_ptx_instruction_classification; // backward pointer + unsigned cdp_latency[5]; class gpgpu_context* gpgpu_ctx; //global functions void ptx_opcocde_latency_options (option_parser_t opp); diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 6cd6d8f..f380560 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -1084,12 +1084,11 @@ void scheduler_unit::cycle() if(pI->m_is_cdp && !warp(warp_id).m_cdp_dummy) { assert(warp(warp_id).m_cdp_latency == 0); - extern unsigned cdp_latency[5]; if(pI->m_is_cdp == 1) - warp(warp_id).m_cdp_latency = cdp_latency[pI->m_is_cdp - 1]; + warp(warp_id).m_cdp_latency = m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp - 1]; else //cudaLaunchDeviceV2 and cudaGetParameterBufferV2 - warp(warp_id).m_cdp_latency = cdp_latency[pI->m_is_cdp - 1] - + cdp_latency[pI->m_is_cdp] * active_mask.count(); + warp(warp_id).m_cdp_latency = m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp - 1] + + m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp] * active_mask.count(); warp(warp_id).m_cdp_dummy = true; break; } |