diff options
| author | Ali Bakhoda <[email protected]> | 2011-11-11 18:49:44 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:18:24 -0700 |
| commit | ff09520a67c7d9478f576fc2be732f1a6476f5a4 (patch) | |
| tree | d5c76e5c6ebcad580605c0e845c9d9c0b97b4f11 | |
| parent | 446a757841a76b31bafe81164b03fece2318bb5a (diff) | |
- Fixing L1 Texture cache option (I updated the description to look like the other L1 cache options) and change the default values to the one in Quadro config. The old default value could not even be parsed.
- Removed the SIMD width option from the shader_core_pipeline_opt description and default value and Quadro config file. Also changed the default thread count from 256 to 1024.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10897]
| -rw-r--r-- | configs/QuadroFX5800/gpgpusim.config | 2 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 9 |
2 files changed, 6 insertions, 5 deletions
diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 3d6afba..c64b394 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -11,7 +11,7 @@ # shader core pipeline config -gpgpu_shader_registers 16384 --gpgpu_shader_core_pipeline 1024:32:32 +-gpgpu_shader_core_pipeline 1024:32 -gpgpu_shader_cta 8 -gpgpu_simd_model 1 diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 98c3984..4c853f7 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -134,11 +134,12 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_simd_model", OPT_INT32, &model, "1 = post-dominator", "1"); option_parser_register(opp, "-gpgpu_shader_core_pipeline", OPT_CSTR, &gpgpu_shader_core_pipeline_opt, - "shader core pipeline config, i.e., {<nthread>:<warpsize>:<pipe_simd_width>}", - "256:32:32"); + "shader core pipeline config, i.e., {<nthread>:<warpsize>}", + "1024:32"); option_parser_register(opp, "-gpgpu_tex_cache:l1", OPT_CSTR, &m_L1T_config.m_config_string, - "per-shader L1 texture cache (READ-ONLY) config, i.e., {<nsets>:<linesize>:<assoc>:<repl>|none}", - "512:64:2:L:R:m"); + "per-shader L1 texture cache (READ-ONLY) config " + " {<nsets>:<bsize>:<assoc>:<rep>:<wr>:<alloc>,<mshr>:<N>:<merge>,<mq>:<rf>}", + "8:128:5:L:R:m,F:128:4,128:2"); option_parser_register(opp, "-gpgpu_const_cache:l1", OPT_CSTR, &m_L1C_config.m_config_string, "per-shader L1 constant memory cache (READ-ONLY) config " " {<nsets>:<bsize>:<assoc>:<rep>:<wr>:<alloc>,<mshr>:<N>:<merge>,<mq>}", |