diff options
| author | Vijay Kandiah <[email protected]> | 2021-10-17 02:07:39 -0500 |
|---|---|---|
| committer | GitHub <[email protected]> | 2021-10-17 02:07:39 -0500 |
| commit | 4a4fc87a2dcd95bfe298f2b3d18a9833a506e499 (patch) | |
| tree | f45fe00a86fb814ebf3f5e711674f233dcdb73a2 /CHANGES | |
| parent | 90ec3399763d7c8512cfe7dc193473086c38ca38 (diff) | |
| parent | 84c4f46fb78b529ab2447d7a676f5b3ac2d9c05f (diff) | |
Merge pull request #5 from accel-sim/dev
GPGPU-Sim Latest Dev Integration
Diffstat (limited to 'CHANGES')
| -rw-r--r-- | CHANGES | 12 |
1 files changed, 12 insertions, 0 deletions
@@ -1,4 +1,16 @@ LOG: +Version 4.1.0 versus 4.0.0 +-Features: +1- Supporting L1 write-allocate with sub-sector writing policy as in Volta+ hardware, and changing the Volta+ cards config to make L1 write-allocate with write-through +2- Making the L1 adaptive cache policy to be configurable +3- Adding Ampere RTX 3060 config files +-Bugs: +1- Fixing L1 bank hash function bug +2- Fixing L1 read hit counters in gpgpu-sim to match nvprof, to achieve more accurate L1 correlation with the HW +3- Fixing bugs in lazy write handling, thanks to Gwendolyn Voskuilen from Sandia labs for this fix +4- Fixing the backend pipeline for sub_core model +5- Fixing Memory stomp bug at the shader_config +6- Some code refactoring: Version 4.0.0 (development branch) versus 3.2.3 -Front-End: 1- Support .nc cache modifier and __ldg function to access the read-only L1D cache |
