diff options
| author | Mahmoud <[email protected]> | 2018-09-20 16:48:23 -0400 |
|---|---|---|
| committer | Mahmoud <[email protected]> | 2018-09-20 16:48:23 -0400 |
| commit | 79a890fc4c22135a368504a5112a0f0a9982659e (patch) | |
| tree | fb551de02e7da76140d72a43a0765bc1cea269b7 /configs/4.x-cfgs/SM6_TITANX | |
| parent | 9463cf92f121f8cc18a7e601c5838c3911d303b0 (diff) | |
fixing some config file
Diffstat (limited to 'configs/4.x-cfgs/SM6_TITANX')
| -rw-r--r-- | configs/4.x-cfgs/SM6_TITANX/gpgpusim.config | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config index 8e93723..45a87cd 100644 --- a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config @@ -65,9 +65,9 @@ # Pascal GP102 has 96KB Shared memory divided over 2 cores, each has 48KB # Pascal GP102 has 2 banks L1 cache, where each is 24KB L1 cache # The defulat is to disable the L1 cache, unless cache modifieres are used --gpgpu_cache:dl1 S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 --gpgpu_cache:dl1PrefL1 S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 --gpgpu_cache:dl1PrefShared S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 +-gpgpu_cache:dl1 S:4:128:48,L:L:s:N:L,A:256:8,16:0,32 +-gpgpu_cache:dl1PrefL1 S:4:128:48,L:L:s:N:L,A:256:8,16:0,32 +-gpgpu_cache:dl1PrefShared S:4:128:48,L:L:s:N:L,A:256:8,16:0,32 -gpgpu_shmem_size 49152 -gpgpu_shmem_size_PrefL1 49152 -gpgpu_shmem_size_PrefShared 49152 |