summaryrefslogtreecommitdiff
path: root/configs/Fermi
diff options
context:
space:
mode:
authorAndrew M. B. Boktor <[email protected]>2012-05-07 18:38:11 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:19:38 -0700
commit8da76f1df562b168b6bb479b9254f3ca5b5c686c (patch)
treeedea499c1869e60240db216937eedb71842c77ce /configs/Fermi
parent5b4b678642d36eac16d637886c7f44d0e2e74ccb (diff)
Removing some bottlenecks that limit that peak-IPC
- FUs depended on the result bus to know if they are going to be used on a certain cycle, this is not the case anymore, occupied bitvectors are added - A configurable number of result buses is added (the number of buses is equal to the EX_WB pipe width) - Modified the Fermi config file to add two ports to the operand collector IPC with a theoretical limit of number_of_SMs*64 is achievable using this configuration [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12349]
Diffstat (limited to 'configs/Fermi')
-rw-r--r--configs/Fermi/gpgpusim.config5
1 files changed, 3 insertions, 2 deletions
diff --git a/configs/Fermi/gpgpusim.config b/configs/Fermi/gpgpusim.config
index afe86e7..5ec3f72 100644
--- a/configs/Fermi/gpgpusim.config
+++ b/configs/Fermi/gpgpusim.config
@@ -24,7 +24,7 @@
# Pipeline widths and number of FUs
# ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB
--gpgpu_pipeline_widths 1,1,1,1,1,1,1
+-gpgpu_pipeline_widths 2,1,1,2,1,1,2
-gpgpu_num_sp_units 2
-gpgpu_num_sfu_units 1
@@ -105,5 +105,6 @@
# enable operand collector
-gpgpu_operand_collector_num_units_sp 6
-gpgpu_operand_collector_num_units_sfu 8
-
+-gpgpu_operand_collector_num_in_ports_sp 2
+-gpgpu_operand_collector_num_out_ports_sp 2
-visualizer_enabled 0