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authorTayler Hetherington <[email protected]>2012-09-19 14:51:45 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:49:20 -0700
commitb09eeed6aa36239f661d6452e996e3e5f8ef5984 (patch)
tree1d71f118193e7eb8b8de79d3f08a934067e5a143 /configs/QuadroFX5800
parentb19fd89f07b3221ea73f6c2442880c2e5c1e68a5 (diff)
Revision #2 of modifying the cache hierarchy.
Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109]
Diffstat (limited to 'configs/QuadroFX5800')
-rw-r--r--configs/QuadroFX5800/gpgpusim.config8
1 files changed, 4 insertions, 4 deletions
diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config
index 20a1605..7f43511 100644
--- a/configs/QuadroFX5800/gpgpusim.config
+++ b/configs/QuadroFX5800/gpgpusim.config
@@ -31,10 +31,10 @@
-ptx_opcode_initiation_dp 8,8,8,8,130
# memory stage behaviour
--gpgpu_cache:il1 4:256:4:L:R:f:A:P:N:2:32:4
--gpgpu_tex_cache:l1 8:128:5:L:R:m:F:P:N:128:4:128:2
--gpgpu_const_cache:l1 64:64:2:L:R:f:A:P:N:2:32:4
--gpgpu_cache:dl2 16:256:8:L:B:m:A:S:W:16:4:4
+-gpgpu_cache:il1 4:256:4:L:R:f:A:N:2:32:4
+-gpgpu_tex_cache:l1 8:128:5:L:R:m:F:N:128:4:128:2
+-gpgpu_const_cache:l1 64:64:2:L:R:f:A:N:2:32:4
+-gpgpu_cache:dl2 16:256:8:L:B:m:A:W:16:4:4
-gpgpu_cache:dl2_texture_only 1
-gpgpu_shmem_warp_parts 2