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authorTim Rogers <[email protected]>2018-11-20 16:13:16 -0500
committerGitHub <[email protected]>2018-11-20 16:13:16 -0500
commit6443f21d433f1b642003867e56fe1f54efae55e3 (patch)
tree6e017904f8dbeab9925810e775a3eaf874d23fdc /configs/tested-cfgs/SM2_GTX480/gpgpusim.config
parent8ec70c69eb89c1fa836c233be3e4c478602d9bb7 (diff)
parent695592593ac59be49bdc013814710e216d18a438 (diff)
Merge pull request #83 from purdue-aalp/dev
INT unit, sub-core-model, Increase L1 throughput and add tensor core config parameters
Diffstat (limited to 'configs/tested-cfgs/SM2_GTX480/gpgpusim.config')
-rw-r--r--configs/tested-cfgs/SM2_GTX480/gpgpusim.config7
1 files changed, 4 insertions, 3 deletions
diff --git a/configs/tested-cfgs/SM2_GTX480/gpgpusim.config b/configs/tested-cfgs/SM2_GTX480/gpgpusim.config
index 4096b09..d71b2fd 100644
--- a/configs/tested-cfgs/SM2_GTX480/gpgpusim.config
+++ b/configs/tested-cfgs/SM2_GTX480/gpgpusim.config
@@ -30,9 +30,10 @@
-gpgpu_simd_model 1
# Pipeline widths and number of FUs
-# ID_OC_SP,ID_OC_DP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_SFU,OC_EX_MEM,EX_WB
-#For Fermi, DP unit =0, DP inst is executed on SFU
--gpgpu_pipeline_widths 2,0,1,1,2,0,1,1,2
+# ID_OC_SP,ID_OC_DP,ID_OC_INT,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_INT,OC_EX_SFU,OC_EX_MEM,EX_WB
+# For Fermi, DP unit =0, DP inst is executed on SFU
+# For Fermi, INT unit =0, INT inst is executed on SP
+-gpgpu_pipeline_widths 2,0,0,1,1,2,0,0,1,1,2
-gpgpu_num_sp_units 2
-gpgpu_num_sfu_units 1
-gpgpu_num_dp_units 0