diff options
| author | Mahmoud <[email protected]> | 2020-05-28 09:05:56 -0400 |
|---|---|---|
| committer | Mahmoud <[email protected]> | 2020-05-28 09:05:56 -0400 |
| commit | 6b72554af7018a8dc42e607f6983a070fe5e5a42 (patch) | |
| tree | 69bab93cc754e0ee69f17a9d1f3a7413241cb621 /configs/tested-cfgs/SM6_TITANX/gpgpusim.config | |
| parent | ede0540e798bac59f65111c8d48661f042412aa8 (diff) | |
splitting execution-driven and trace-driven config files
Diffstat (limited to 'configs/tested-cfgs/SM6_TITANX/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM6_TITANX/gpgpusim.config | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config index a686238..ce6f745 100644 --- a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config @@ -22,8 +22,6 @@ # SASS execution (only supported with CUDA >= 4.0) -gpgpu_ptx_convert_to_ptxplus 0 -gpgpu_ptx_save_converted_ptxplus 0 -# SASS trace-driven mode execution -#-trace_driven_mode 1 # high level architecture configuration -gpgpu_n_clusters 28 @@ -66,11 +64,6 @@ -ptx_opcode_initiation_sfu 4 -ptx_opcode_latency_sfu 20 --trace_opcode_latency_initiation_int 4,1 --trace_opcode_latency_initiation_sp 4,1 --trace_opcode_latency_initiation_dp 20,8 --trace_opcode_latency_initiation_sfu 20,4 - # in sub_core_model, schedulers are isolated, each scheduler has its own register file and EUs -gpgpu_sub_core_model 1 # enable operand collector |