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| author | tgrogers <[email protected]> | 2019-08-26 14:56:00 -0400 |
|---|---|---|
| committer | tgrogers <[email protected]> | 2019-08-26 14:56:00 -0400 |
| commit | fd91575e7dcc40653ea0279ef33d845d1d473ffa (patch) | |
| tree | 759a1a2ac29e137a6541d998656be9c86d426136 /configs/tested-cfgs/SM6_TITANX/gpgpusim.config | |
| parent | 841bb925e7ff06d7165f14fe2d1fce6561ab29b9 (diff) | |
| parent | 0df569774615120c76fb5f139f8698175a722293 (diff) | |
Merge branch 'dev' of github.com:purdue-aalp/gpgpu-sim_distribution into dev
Diffstat (limited to 'configs/tested-cfgs/SM6_TITANX/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM6_TITANX/gpgpusim.config | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config index 2fe898a..e6d8f1d 100644 --- a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config @@ -81,6 +81,7 @@ -gpgpu_cache:dl1PrefL1 S:4:128:48,L:L:s:N:L,A:256:8,16:0,32 -gpgpu_cache:dl1PrefShared S:4:128:48,L:L:s:N:L,A:256:8,16:0,32 -gpgpu_shmem_size 49152 +-gpgpu_shmem_sizeDefault 49152 -gpgpu_shmem_size_PrefL1 49152 -gpgpu_shmem_size_PrefShared 49152 # By default, L1 cache is disabled in Pascal P102. |