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authorMahmoud Khairy A. Abdallah <[email protected]>2021-05-19 19:39:48 -0400
committerMahmoud Khairy A. Abdallah <[email protected]>2021-05-19 19:39:48 -0400
commita2ba2f57e8a24b9dd6ec6f2568accbbf439a9dca (patch)
tree6fd4831d23585ac882bd39d6314bc6dee605c058 /configs/tested-cfgs/SM75_RTX2060/gpgpusim.config
parent604baaf59255776b4714c0270ce36ad823d34df4 (diff)
updating config files with right adaptive cache parameters
Diffstat (limited to 'configs/tested-cfgs/SM75_RTX2060/gpgpusim.config')
-rw-r--r--configs/tested-cfgs/SM75_RTX2060/gpgpusim.config18
1 files changed, 10 insertions, 8 deletions
diff --git a/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config b/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config
index d7573ab..9e50fa3 100644
--- a/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config
+++ b/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config
@@ -99,19 +99,21 @@
# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
# ** Optional parameter - Required when mshr_type==Texture Fifo
--gpgpu_adaptive_cache_config 0
--gpgpu_shmem_option 0,8,16,32,64,100
--gpgpu_unified_l1d_size 128
+-gpgpu_adaptive_cache_config 1
+-gpgpu_shmem_option 32,64
+-gpgpu_unified_l1d_size 96
+# L1 cache configuration
-gpgpu_l1_banks 4
--gpgpu_cache:dl1 S:1:128:512,L:L:m:N:L,A:512:8,16:0,32
+-gpgpu_cache:dl1 S:1:128:256,L:L:m:N:L,A:512:8,16:0,32
+-gpgpu_l1_latency 20
+-gpgpu_gmem_skip_L1D 0
+-gpgpu_n_cluster_ejection_buffer_size 32
+-gpgpu_flush_l1_cache 1
+# shared memory configuration
-gpgpu_shmem_size 65536
-gpgpu_shmem_sizeDefault 65536
-gpgpu_shmem_per_block 65536
--gpgpu_gmem_skip_L1D 0
--gpgpu_n_cluster_ejection_buffer_size 32
--gpgpu_l1_latency 20
-gpgpu_smem_latency 20
--gpgpu_flush_l1_cache 1
# 64 sets, each 128 bytes 16-way for each memory sub partition (128 KB per memory sub partition). This gives us 3MB L2 cache
-gpgpu_cache:dl2 S:64:128:16,L:B:m:L:P,A:192:4,32:0,32