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| author | Mahmoud Khairy A. Abdallah <[email protected]> | 2020-05-18 21:49:34 -0400 |
|---|---|---|
| committer | Mahmoud Khairy A. Abdallah <[email protected]> | 2020-05-18 21:49:34 -0400 |
| commit | 52204ff08a9c9a21a99fee3f976d2a419c014fec (patch) | |
| tree | 3b6e888267ac1aae2af024cf7ef80d5f921600e4 /configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config | |
| parent | fe8dd7eadbb67b9e917c92c9c540812db35fce37 (diff) | |
fixing some failing apps
Diffstat (limited to 'configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config b/configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config index 0255f76..0df3eec 100644 --- a/configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config +++ b/configs/tested-cfgs/SM7_QV100_SASS/gpgpusim.config @@ -74,8 +74,8 @@ -ptx_opcode_initiation_dp 4,4,4,4,130 -ptx_opcode_latency_sfu 100 -ptx_opcode_initiation_sfu 8 --ptx_opcode_latency_tesnor 6 --ptx_opcode_initiation_tensor 2 +-ptx_opcode_latency_tesnor 8 +-ptx_opcode_initiation_tensor 4 # Volta has sub core model, in which each scheduler has its own register file and EUs # i.e. schedulers are isolated |