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| author | Mahmoud Khairy A. Abdallah <[email protected]> | 2021-05-19 18:03:13 -0400 |
|---|---|---|
| committer | Mahmoud Khairy A. Abdallah <[email protected]> | 2021-05-19 18:03:13 -0400 |
| commit | 33635368080d125391766d32223b4eaaa50396e6 (patch) | |
| tree | 527a3632df8fb55e0e0981a5620fd1bf8d62d84b /configs/tested-cfgs/SM7_TITANV/gpgpusim.config | |
| parent | 14f22bcdd171cdeb8d8f56f9ed02d6f711189be8 (diff) | |
| parent | 2b2b6a2916e4ed833c707be887bf927167a71fa6 (diff) | |
Merge branch 'dev' of https://github.com/accel-sim/gpgpu-sim_distribution into dev
Diffstat (limited to 'configs/tested-cfgs/SM7_TITANV/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index 3af314c..32245d7 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -125,6 +125,9 @@ -gpgpu_l1_latency 20 -gpgpu_smem_latency 20 -gpgpu_flush_l1_cache 1 +-gpgpu_l1_cache_write_ratio 25 +-gpgpu_shmem_option 0,12,24,48,96 +-gpgpu_unified_l1d_size 128 # 32 sets, each 128 bytes 24-way for each memory sub partition (96 KB per memory sub partition). This gives us 4.5MB L2 cache -gpgpu_cache:dl2 S:32:128:24,L:B:m:L:P,A:192:4,32:0,32 |