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authorMahmoud Khairy A. Abdallah <[email protected]>2021-05-19 22:20:56 -0400
committerMahmoud Khairy A. Abdallah <[email protected]>2021-05-19 22:20:56 -0400
commit7fac247e3e1c4326081c3ea4d46da6c5dc83ccb9 (patch)
tree6f45c4e4450fb53e55834a37fcc8ad7c3ca4210b /configs/tested-cfgs/SM86_RTX3070
parentb466afea67e6d6faf49f01ecfe378257fbdb93af (diff)
change L1 cache config in Volta+ to be write-through and write-allocate based on recent ubench
Diffstat (limited to 'configs/tested-cfgs/SM86_RTX3070')
-rw-r--r--configs/tested-cfgs/SM86_RTX3070/gpgpusim.config3
1 files changed, 1 insertions, 2 deletions
diff --git a/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config b/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
index c70cfe8..02cdb9e 100644
--- a/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
+++ b/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
@@ -101,7 +101,6 @@
## L1/shared memory configuration
# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
# ** Optional parameter - Required when mshr_type==Texture Fifo
-# Default config is 28KB DL1 and 100KB shared memory
# In Ampere, we assign the remaining shared memory to L1 cache
# if the assigned shd mem = 0, then L1 cache = 128KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-memory-8-x
@@ -111,7 +110,7 @@
-gpgpu_unified_l1d_size 128
# Ampere unified cache has four banks
-gpgpu_l1_banks 4
--gpgpu_cache:dl1 S:4:128:64,L:L:m:N:L,A:512:8,16:0,32
+-gpgpu_cache:dl1 S:4:128:64,L:T:m:L:L,A:512:8,16:0,32
-gpgpu_l1_cache_write_ratio 25
-gpgpu_gmem_skip_L1D 0
-gpgpu_l1_latency 20