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authorJRPan <[email protected]>2023-06-27 12:50:42 +0800
committerGitHub <[email protected]>2023-06-27 12:50:42 +0800
commit95822cbf2c6f8f7a15d5b1bc3bf0eb5250f8d36e (patch)
treecd31b7036b891842203e8f4ade1237bff5901646 /configs/tested-cfgs/SM86_RTX3070
parent46428eeaf3cfdb87fb6c323afd92e4bd79c54476 (diff)
parent58beccb510bb892de56b466ac764f24297affebd (diff)
Merge branch 'dev' into dev
Diffstat (limited to 'configs/tested-cfgs/SM86_RTX3070')
-rw-r--r--configs/tested-cfgs/SM86_RTX3070/gpgpusim.config2
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config b/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
index aee0130..d26b1a6 100644
--- a/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
+++ b/configs/tested-cfgs/SM86_RTX3070/gpgpusim.config
@@ -83,7 +83,7 @@
-gpgpu_dual_issue_diff_exec_units 1
## L1/shared memory configuration
-# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
+# <sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
# ** Optional parameter - Required when mshr_type==Texture Fifo
# In adaptive cache, we adaptively assign the remaining shared memory to L1 cache
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x