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authorMahmoud <[email protected]>2018-10-10 21:04:24 -0400
committerMahmoud <[email protected]>2018-10-10 21:04:24 -0400
commit3d0f3691c6ccff4a912fc0fb751291a96832cd13 (patch)
tree1d293e40e40ceb7f9a45a29e12d2cebbefc64b65 /configs
parent6f345dd40ed6c73eefec2a52858ce62f72a6fa25 (diff)
removing unnecassery files
Diffstat (limited to 'configs')
-rw-r--r--configs/4.x-cfgs/SM6_TITANX_1Xintes/config_fermi_islip.icnt73
1 files changed, 0 insertions, 73 deletions
diff --git a/configs/4.x-cfgs/SM6_TITANX_1Xintes/config_fermi_islip.icnt b/configs/4.x-cfgs/SM6_TITANX_1Xintes/config_fermi_islip.icnt
deleted file mode 100644
index 85ac0d7..0000000
--- a/configs/4.x-cfgs/SM6_TITANX_1Xintes/config_fermi_islip.icnt
+++ /dev/null
@@ -1,73 +0,0 @@
-//21*1 fly with 32 flits per packet under gpgpusim injection mode
-use_map = 0;
-flit_size = 40;
-
-// currently we do not use this, see subnets below
-network_count = 2;
-
-// Topology
-topology = fly;
-k = 52;
-n = 1;
-
-// Routing
-
-routing_function = dest_tag;
-
-// Flow control
-
-num_vcs = 1;
-vc_buf_size = 64;
-input_buffer_size = 256;
-ejection_buffer_size = 64;
-boundary_buffer_size = 64;
-
-wait_for_tail_credit = 0;
-
-// Router architecture
-
-vc_allocator = islip; //separable_input_first;
-sw_allocator = islip; //separable_input_first;
-alloc_iters = 1;
-
-credit_delay = 0;
-routing_delay = 0;
-vc_alloc_delay = 1;
-sw_alloc_delay = 1;
-
-input_speedup = 1;
-output_speedup = 1;
-internal_speedup = 1.0;
-
-// Traffic, GPGPU-Sim does not use this
-
-traffic = uniform;
-packet_size ={{1,2,3,4},{10,20}};
-packet_size_rate={{1,1,1,1},{2,1}};
-
-// Simulation - Don't change
-
-sim_type = gpgpusim;
-//sim_type = latency;
-injection_rate = 0.1;
-
-subnets = 2;
-
-// Always use read and write no matter following line
-//use_read_write = 1;
-
-
-read_request_subnet = 0;
-read_reply_subnet = 1;
-write_request_subnet = 0;
-write_reply_subnet = 1;
-
-read_request_begin_vc = 0;
-read_request_end_vc = 0;
-write_request_begin_vc = 0;
-write_request_end_vc = 0;
-read_reply_begin_vc = 0;
-read_reply_end_vc = 0;
-write_reply_begin_vc = 0;
-write_reply_end_vc = 0;
-