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authorNick <[email protected]>2019-02-18 11:21:14 -0500
committerNick <[email protected]>2019-02-18 11:21:14 -0500
commit7baae0e937143e0acfc71382eb432bdc42d4ca41 (patch)
treebf524d98631a3b01a2addbb1fe25c3e0d8b0b5a6 /configs
parent4ed2d9e106d797eeaf5199100984dc7c658cdc1e (diff)
Fix spelling from adpative -> adaptive for volta cache config
Diffstat (limited to 'configs')
-rw-r--r--configs/tested-cfgs/SM7_TITANV/gpgpusim.config2
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config
index 8ed4cd0..b283095 100644
--- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config
+++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config
@@ -75,7 +75,7 @@
# if the assigned shd mem = 0, then L1 cache = 128KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
# disable this mode in case of multi kernels/apps execution
--adpative_volta_cache_config 1
+-adaptive_volta_cache_config 1
# Volta unified cache has four ports
-mem_unit_ports 4
-gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32