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authorTor Aamodt <[email protected]>2010-10-10 21:19:52 -0800
committerTor Aamodt <[email protected]>2010-10-10 21:19:52 -0800
commitb3ce70a797756285ea9b15b3e5cf515d8b6a2b63 (patch)
tree5b84d880e646f80611cc5b01931fdde622c5e06c /configs
parent0151c5c566dcbcbb962acf35c86a8e0f4a4a6eb6 (diff)
1. create function unit classes for SP, SFU, LD/ST.
2. refactor memory stage into a ld/st function unit 3. refactor memory access generation (moved into warp_inst_t class) the above should make supporting fermi uarch much easier passing CUDA 3.1 regression still need to... (a) update scoreboard to keep count of outstanding memory requests and use operand collector for writebacks into register file (b) add back shared memory pipeline delay (c) remove use of MSHR's for non-cached global/local accesses (d) replace texture cache with a split tag/data array pipe (e) re-implement memory_partition stuff so it makes more sense [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7844]
Diffstat (limited to 'configs')
-rw-r--r--configs/QuadroFX5800/gpgpusim.config4
1 files changed, 1 insertions, 3 deletions
diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config
index 2805674..e5e29bc 100644
--- a/configs/QuadroFX5800/gpgpusim.config
+++ b/configs/QuadroFX5800/gpgpusim.config
@@ -4,7 +4,6 @@
-gpgpu_ptx_force_max_capability 11
# high level architecture configuration
--gpgpu_sm_uarch GT200
-gpgpu_n_shader 30
-gpgpu_n_mem 8
-gpgpu_clock_domains 325.0:650.0:650.0:800.0
@@ -56,8 +55,7 @@
-gpgpu_ptx_save_converted_ptxplus 1
# enable operand collector
--gpgpu_operand_collector 1
--gpgpu_operand_collector_num_units 6
+-gpgpu_operand_collector_num_units_sp 6
-gpgpu_operand_collector_num_units_sfu 8
-visualizer_enabled 0