diff options
| author | Mahmoud <[email protected]> | 2018-10-10 17:56:50 -0400 |
|---|---|---|
| committer | Mahmoud <[email protected]> | 2018-10-10 17:56:50 -0400 |
| commit | c58ee08f0e7ec7c7ee6794d8ce2616ed1b0c10f2 (patch) | |
| tree | 36ba480e8fbb9f46836c2d597d091fb1f8c81516 /configs | |
| parent | 99634600280d64ec2a346c1d729d0e7a94a95337 (diff) | |
fixing freq of TITANV
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/3.x-cfgs/SM7_TITANV/gpgpusim.config | 4 | ||||
| -rw-r--r-- | configs/4.x-cfgs/SM7_TITANV/gpgpusim.config | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/configs/3.x-cfgs/SM7_TITANV/gpgpusim.config b/configs/3.x-cfgs/SM7_TITANV/gpgpusim.config index 738c881..aefb04a 100644 --- a/configs/3.x-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/3.x-cfgs/SM7_TITANV/gpgpusim.config @@ -27,9 +27,9 @@ #-gpgpu_clock_domains <Core Clock>:<Interconnect Clock>:<L2 Clock>:<DRAM Clock> # Pascal NVIDIA GP100 clock domains are adopted from # https://en.wikipedia.org/wiki/Volta_(microarchitecture) --gpgpu_clock_domains 1200.0:1200.0:2000.0:850.0 +-gpgpu_clock_domains 1200.0:1200.0:1200.0:850.0 # boost mode -# -gpgpu_clock_domains 1455.0:1455.0:2000.0:850.0 +# -gpgpu_clock_domains 1455.0:2000.0:1455.0:850.0 # shader core pipeline config -gpgpu_shader_registers 65536 diff --git a/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config b/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config index b4576dc..41757f8 100644 --- a/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config @@ -27,9 +27,9 @@ #-gpgpu_clock_domains <Core Clock>:<Interconnect Clock>:<L2 Clock>:<DRAM Clock> # Volta NVIDIA GV100 clock domains are adopted from # https://en.wikipedia.org/wiki/Volta_(microarchitecture) --gpgpu_clock_domains 1200.0:1200.0:1200.0:850.0 +-gpgpu_clock_domains 1200.0:2000.0:1200.0:850.0 # boost mode -# -gpgpu_clock_domains 1455.0:1455.0:2000.0:850.0 +# -gpgpu_clock_domains 1455.0:2000.0:1455.0:850.0 # shader core pipeline config -gpgpu_shader_registers 65536 |