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authorMahmoud <[email protected]>2019-05-08 11:39:11 -0400
committerMahmoud <[email protected]>2019-05-08 11:39:11 -0400
commitd82c8bab428ebbb0d3240bf039dd81da21807a13 (patch)
treeba0a7dff5c9b743f1c99bd4c73880c6104d994b2 /configs
parent5325856b19fbb175d1f2af0a48cc0fa8e453ca24 (diff)
fixing volta config
Diffstat (limited to 'configs')
-rw-r--r--configs/tested-cfgs/SM7_V100/gpgpusim.config2
-rw-r--r--configs/tested-cfgs/SM7_V100_fastlocalxbar/gpgpusim.config3
2 files changed, 2 insertions, 3 deletions
diff --git a/configs/tested-cfgs/SM7_V100/gpgpusim.config b/configs/tested-cfgs/SM7_V100/gpgpusim.config
index d7ebe39..ef93cea 100644
--- a/configs/tested-cfgs/SM7_V100/gpgpusim.config
+++ b/configs/tested-cfgs/SM7_V100/gpgpusim.config
@@ -75,7 +75,7 @@
# if the assigned shd mem = 0, then L1 cache = 128KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
# disable this mode in case of multi kernels/apps execution
--adpative_volta_cache_config 1
+-adaptive_volta_cache_config 1
# Volta unified cache has four ports
-mem_unit_ports 4
-gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32
diff --git a/configs/tested-cfgs/SM7_V100_fastlocalxbar/gpgpusim.config b/configs/tested-cfgs/SM7_V100_fastlocalxbar/gpgpusim.config
index 401aafd..66f5251 100644
--- a/configs/tested-cfgs/SM7_V100_fastlocalxbar/gpgpusim.config
+++ b/configs/tested-cfgs/SM7_V100_fastlocalxbar/gpgpusim.config
@@ -75,7 +75,7 @@
# if the assigned shd mem = 0, then L1 cache = 128KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
# disable this mode in case of multi kernels/apps execution
--adpative_volta_cache_config 1
+-adaptive_volta_cache_config 1
# Volta unified cache has four ports
-mem_unit_ports 4
-gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32
@@ -128,7 +128,6 @@
-inct_in_buffer_limit 512
-inct_out_buffer_limit 512
-inct_subnets 2
--fast_execution_mode 1
# memory partition latency config
-rop_latency 120