diff options
| author | aamir <[email protected]> | 2018-05-27 14:18:53 -0700 |
|---|---|---|
| committer | aamir <[email protected]> | 2018-05-27 14:18:53 -0700 |
| commit | 7dfa2ae2e6f8ccaaf133318265a7ab00de546e82 (patch) | |
| tree | 080df98c254a0772d2f445e79e89de0f651fe962 /cuda-kernels/config_fermi_islip.icnt | |
| parent | bae67e6a355047e360c30391588c2076913f86fa (diff) | |
added wmma parsing but execution getting aborted
Diffstat (limited to 'cuda-kernels/config_fermi_islip.icnt')
| -rwxr-xr-x | cuda-kernels/config_fermi_islip.icnt | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/cuda-kernels/config_fermi_islip.icnt b/cuda-kernels/config_fermi_islip.icnt new file mode 100755 index 0000000..a788090 --- /dev/null +++ b/cuda-kernels/config_fermi_islip.icnt @@ -0,0 +1,70 @@ +//21*1 fly with 32 flits per packet under gpgpusim injection mode +use_map = 0; +flit_size = 32; + +// currently we do not use this, see subnets below +network_count = 2; + +// Topology +topology = fly; +k = 62; +n = 1; + +// Routing + +routing_function = dest_tag; + +// Flow control + +num_vcs = 1; +vc_buf_size = 8; + +wait_for_tail_credit = 0; + +// Router architecture + +vc_allocator = islip; //separable_input_first; +sw_allocator = islip; //separable_input_first; +alloc_iters = 1; + +credit_delay = 0; +routing_delay = 0; +vc_alloc_delay = 1; +sw_alloc_delay = 1; + +input_speedup = 2; +output_speedup = 1; +internal_speedup = 1.0; + +// Traffic, GPGPU-Sim does not use this + +traffic = uniform; +packet_size ={{1,2,3,4},{10,20}}; +packet_size_rate={{1,1,1,1},{2,1}}; + +// Simulation - Don't change + +sim_type = gpgpusim; +//sim_type = latency; +injection_rate = 0.1; + +subnets = 2; + +// Always use read and write no matter following line +//use_read_write = 1; + + +read_request_subnet = 0; +read_reply_subnet = 1; +write_request_subnet = 0; +write_reply_subnet = 1; + +read_request_begin_vc = 0; +read_request_end_vc = 0; +write_request_begin_vc = 0; +write_request_end_vc = 0; +read_reply_begin_vc = 0; +read_reply_end_vc = 0; +write_reply_begin_vc = 0; +write_reply_end_vc = 0; + |
