diff options
| author | Mahmoud <[email protected]> | 2020-05-23 22:45:28 -0400 |
|---|---|---|
| committer | Mahmoud <[email protected]> | 2020-05-23 22:45:28 -0400 |
| commit | 47e1a8a3a45203c34a93672a1b1bd742dc193183 (patch) | |
| tree | 4db7185ba2d4af2bd03e1388cd15a33b95ea8562 /src/abstract_hardware_model.cc | |
| parent | 90a36a59f5619790b7f6d80375f69d05a75c0a82 (diff) | |
code refomratting
Diffstat (limited to 'src/abstract_hardware_model.cc')
| -rw-r--r-- | src/abstract_hardware_model.cc | 46 |
1 files changed, 25 insertions, 21 deletions
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc index 29df769..1247235 100644 --- a/src/abstract_hardware_model.cc +++ b/src/abstract_hardware_model.cc @@ -536,30 +536,30 @@ void warp_inst_t::memory_coalescing_arch(bool is_write, transaction_info &info = subwarp_transactions[block_address]; // can only write to one segment - //it seems like in trace driven, a thread can write to more than one segment - //assert(block_address == line_size_based_tag_func(addr+data_size_coales-1,segment_size)); + // it seems like in trace driven, a thread can write to more than one + // segment assert(block_address == + // line_size_based_tag_func(addr+data_size_coales-1,segment_size)); info.chunks.set(chunk); info.active.set(thread); unsigned idx = (addr & 127); - for( unsigned i=0; i < data_size_coales; i++ ) - if((idx+i) < MAX_MEMORY_ACCESS_SIZE) - info.bytes.set(idx+i); + for (unsigned i = 0; i < data_size_coales; i++) + if ((idx + i) < MAX_MEMORY_ACCESS_SIZE) info.bytes.set(idx + i); - //it seems like in trace driven, a thread can write to more than one segment - //handle this special case - if(block_address != line_size_based_tag_func(addr+data_size_coales-1,segment_size)) { - addr = addr+data_size_coales-1; - unsigned block_address = line_size_based_tag_func(addr,segment_size); - unsigned chunk = (addr&127)/32; - transaction_info &info = subwarp_transactions[block_address]; - info.chunks.set(chunk); - info.active.set(thread); - unsigned idx = (addr&127); - for( unsigned i=0; i < data_size_coales; i++ ) - if((idx+i) < MAX_MEMORY_ACCESS_SIZE) - info.bytes.set(idx+i); - } + // it seems like in trace driven, a thread can write to more than one + // segment handle this special case + if (block_address != line_size_based_tag_func( + addr + data_size_coales - 1, segment_size)) { + addr = addr + data_size_coales - 1; + unsigned block_address = line_size_based_tag_func(addr, segment_size); + unsigned chunk = (addr & 127) / 32; + transaction_info &info = subwarp_transactions[block_address]; + info.chunks.set(chunk); + info.active.set(thread); + unsigned idx = (addr & 127); + for (unsigned i = 0; i < data_size_coales; i++) + if ((idx + i) < MAX_MEMORY_ACCESS_SIZE) info.bytes.set(idx + i); + } } } @@ -763,7 +763,9 @@ kernel_info_t::kernel_info_t(dim3 gridDim, dim3 blockDim, // Jin: launch latency management m_launch_latency = entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency; - m_kernel_TB_latency = entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency + num_blocks() * entry->gpgpu_ctx->device_runtime->g_TB_launch_latency; + m_kernel_TB_latency = + entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency + + num_blocks() * entry->gpgpu_ctx->device_runtime->g_TB_launch_latency; cache_config_set = false; } @@ -792,7 +794,9 @@ kernel_info_t::kernel_info_t( // Jin: launch latency management m_launch_latency = entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency; - m_kernel_TB_latency = entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency + num_blocks() * entry->gpgpu_ctx->device_runtime->g_TB_launch_latency; + m_kernel_TB_latency = + entry->gpgpu_ctx->device_runtime->g_kernel_launch_latency + + num_blocks() * entry->gpgpu_ctx->device_runtime->g_TB_launch_latency; cache_config_set = false; m_NameToCudaArray = nameToCudaArray; |
