diff options
| author | tgrogers <[email protected]> | 2018-02-21 22:46:20 -0500 |
|---|---|---|
| committer | tgrogers <[email protected]> | 2018-02-21 22:46:20 -0500 |
| commit | 71d9ada37b64360a216dbceef5b7a26a6cab8480 (patch) | |
| tree | ac0180ec5fb467ea54cea51f9105c4c76e3ac26e /src/abstract_hardware_model.cc | |
| parent | 7796a731c2a7d14a58d1369af62c8ad589c63921 (diff) | |
| parent | 4a94401a277342cfd0799863b1a07abc95f954c7 (diff) | |
merging in the mainline
Diffstat (limited to 'src/abstract_hardware_model.cc')
| -rw-r--r-- | src/abstract_hardware_model.cc | 39 |
1 files changed, 15 insertions, 24 deletions
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc index 64eb43c..d2a155c 100644 --- a/src/abstract_hardware_model.cc +++ b/src/abstract_hardware_model.cc @@ -314,7 +314,7 @@ void warp_inst_t::generate_mem_accesses() break; case global_space: case local_space: case param_space_local: - if( m_config->gpgpu_coalesce_arch == 13 || m_config->gpgpu_coalesce_arch == 20) { + if( m_config->gpgpu_coalesce_arch >= 13 && m_config->gpgpu_coalesce_arch <= 62) { if(isatomic()) memory_coalescing_arch_atomic(is_write, access_type); else @@ -356,37 +356,28 @@ void warp_inst_t::memory_coalescing_arch( bool is_write, mem_access_type access_ { // see the CUDA manual where it discusses coalescing rules before reading this unsigned segment_size = 0; - unsigned warp_parts; + unsigned warp_parts = m_config->mem_warp_parts; + bool sector_segment_size = false; - //TO DO: need to double check how doubles are coalesced! - if(data_size == 1) + if(m_config->gpgpu_coalesce_arch >= 20 && m_config->gpgpu_coalesce_arch < 39) { - //If it is byte data, then coalesce on the whole 32 threads, regardless the arch version - warp_parts = 1; - } - else if(m_config->gpgpu_coalesce_arch == 13) - { - //mem_warp_parts should equal 2 for arch=13 - //use the parameter mem_warp_parts for arch=13 to ensure it is backward compatibility with older gpgpu config files - warp_parts = m_config->mem_warp_parts; - } - else if(m_config->gpgpu_coalesce_arch == 20) - { - //It is expected that L1_warp_parts_non_cached = 4 and L1_warp_parts_cached = 1 for arch=20 - //non cached, coalesce on 8 threads to generate 32 bytes accesses - //cached, coalesce on 32 threads to generate 128 bytes accesses + //Fermi and Kepler, L1 is normal and L2 is sector if(m_config->gmem_skip_L1D || cache_op == CACHE_GLOBAL) - warp_parts = m_config->L1_warp_parts_non_cached; + sector_segment_size = true; else - warp_parts = m_config->L1_warp_parts_cached; + sector_segment_size = false; + } + else if(m_config->gpgpu_coalesce_arch >= 40) + { + //Maxwell and Pascal, L1 and L2 are sectors + //all requests should be 32 bytes + sector_segment_size = true; } - else - abort(); switch( data_size ) { case 1: segment_size = 32; break; - case 2: segment_size = 64; break; - case 4: case 8: case 16: segment_size = 128; break; + case 2: segment_size = sector_segment_size? 32 : 64; break; + case 4: case 8: case 16: segment_size = sector_segment_size? 32 : 128; break; } unsigned subwarp_size = m_config->warp_size / warp_parts; |
