A bunch of maintenance fixes, the largest of which is getting the PTX simulation to work with CUDA 12. (#95)

* Fixing the formatter to always use a consistent format and running it on the codebase

* Update linux-so-version.txt

* Update Makefile

* A couple of unnecessary files that are lingering around

* Support CUDA 12

* Getting the PTX simulations to work with CUDA 12. The issue is that ptxas added more information (number of barriers and compile time). We have to parse these or lexx/yacc fail.

* Update ptxinfo.l

debug MACRO was ineffective

* Update gpgpusim_check.cmake

Update to make the CUDA version print a warning, not an error and updating the print to be more reflective of what the actual problem is.

1 files changed, 8 insertions, 21 deletions

diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 98a4039..cddf523 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -248,9 +248,7 @@ class kernel_info_t {
   }
   bool running() const { return m_num_cores_running > 0; }
   bool done() const { return no_more_ctas_to_run() && !running(); }
-  class function_info *entry() {
-    return m_kernel_entry;
-  }
+  class function_info *entry() { return m_kernel_entry; }
   const class function_info *entry() const { return m_kernel_entry; }
 
   size_t num_blocks() const {
@@ -300,9 +298,7 @@ class kernel_info_t {
   std::list<class ptx_thread_info *> &active_threads() {
     return m_active_threads;
   }
-  class memory_space *get_param_memory() {
-    return m_param_mem;
-  }
+  class memory_space *get_param_memory() { return m_param_mem; }
 
   // The following functions access texture bindings present at the kernel's
   // launch
@@ -609,15 +605,9 @@ class gpgpu_t {
   void memcpy_from_gpu(void *dst, size_t src_start_addr, size_t count);
   void memcpy_gpu_to_gpu(size_t dst, size_t src, size_t count);
 
-  class memory_space *get_global_memory() {
-    return m_global_mem;
-  }
-  class memory_space *get_tex_memory() {
-    return m_tex_mem;
-  }
-  class memory_space *get_surf_memory() {
-    return m_surf_mem;
-  }
+  class memory_space *get_global_memory() { return m_global_mem; }
+  class memory_space *get_tex_memory() { return m_tex_mem; }
+  class memory_space *get_surf_memory() { return m_surf_mem; }
 
   void gpgpu_ptx_sim_bindTextureToArray(const struct textureReference *texref,
                                         const struct cudaArray *array);
@@ -701,6 +691,7 @@ struct gpgpu_ptx_sim_info {
   int cmem;
   int gmem;
   int regs;
+  int barriers;
   unsigned maxthreads;
   unsigned ptx_version;
   unsigned sm_target;
@@ -1336,9 +1327,7 @@ class core_t {
   virtual bool warp_waiting_at_barrier(unsigned warp_id) const = 0;
   virtual void checkExecutionStatusAndUpdate(warp_inst_t &inst, unsigned t,
                                              unsigned tid) = 0;
-  class gpgpu_sim *get_gpu() {
-    return m_gpu;
-  }
+  class gpgpu_sim *get_gpu() { return m_gpu; }
   void execute_warp_inst_t(warp_inst_t &inst, unsigned warpId = (unsigned)-1);
   bool ptx_thread_done(unsigned hw_thread_id) const;
   virtual void updateSIMTStack(unsigned warpId, warp_inst_t *inst);
@@ -1348,9 +1337,7 @@ class core_t {
   void get_pdom_stack_top_info(unsigned warpId, unsigned *pc,
                                unsigned *rpc) const;
   kernel_info_t *get_kernel_info() { return m_kernel; }
-  class ptx_thread_info **get_thread_info() {
-    return m_thread;
-  }
+  class ptx_thread_info **get_thread_info() { return m_thread; }
   unsigned get_warp_size() const { return m_warp_size; }
   void and_reduction(unsigned ctaid, unsigned barid, bool value) {
     reduction_storage[ctaid][barid] &= value;