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authorMahmoud <[email protected]>2018-11-06 19:05:31 -0500
committerMahmoud <[email protected]>2018-11-06 19:05:31 -0500
commitaea51499825e8493f6e4ae1cae7c763797704dc8 (patch)
treebbf89d83d810e6c14b5005491747e3f25e719517 /src/abstract_hardware_model.h
parentffee4550d7452af93d3dcd05fc9a105a56b5b077 (diff)
parent0265d747b06c18d0a1ee00fb1641032201425c97 (diff)
Merge branch 'dev' of https://github.com/gpgpu-sim/gpgpu-sim_distribution into dev-tensor
Diffstat (limited to 'src/abstract_hardware_model.h')
-rw-r--r--src/abstract_hardware_model.h41
1 files changed, 34 insertions, 7 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index d123131..5543a71 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -36,11 +36,16 @@ class kernel_info_t;
#define MAX_CTA_PER_SHADER 32
#define MAX_BARRIERS_PER_CTA 16
+//After expanding the vector input and output operands
+#define MAX_INPUT_VALUES 24
+#define MAX_OUTPUT_VALUES 8
+
enum _memory_space_t {
undefined_space=0,
reg_space,
local_space,
shared_space,
+ sstarr_space,
param_space_unclassified,
param_space_kernel, /* global to all threads in a kernel : read-only */
param_space_local, /* local to a thread : read-writable */
@@ -76,9 +81,12 @@ enum uarch_op_t {
NO_OP=-1,
ALU_OP=1,
SFU_OP,
+ TENSOR_CORE_OP,
DP_OP,
ALU_SFU_OP,
LOAD_OP,
+ TENSOR_CORE_LOAD_OP,
+ TENSOR_CORE_STORE_OP,
STORE_OP,
BRANCH_OP,
BARRIER_OP,
@@ -134,6 +142,7 @@ enum operation_pipeline_t {
SP__OP,
DP__OP,
SFU__OP,
+ TENSOR_CORE__OP,
MEM__OP
};
typedef enum operation_pipeline_t operation_pipeline;
@@ -617,6 +626,7 @@ public:
return false;
}
enum _memory_space_t get_type() const { return m_type; }
+ void set_type( enum _memory_space_t t ) { m_type = t; }
unsigned get_bank() const { return m_bank; }
void set_bank( unsigned b ) { m_bank = b; }
bool is_const() const { return (m_type == const_space) || (m_type == param_space_kernel); }
@@ -770,7 +780,7 @@ public:
};
// the maximum number of destination, source, or address uarch operands in a instruction
-#define MAX_REG_OPERANDS 8
+#define MAX_REG_OPERANDS 32
struct dram_callback_t {
dram_callback_t() { function=NULL; instruction=NULL; thread=NULL; }
@@ -817,8 +827,8 @@ public:
{
fprintf(fp," [inst @ pc=0x%04x] ", pc );
}
- bool is_load() const { return (op == LOAD_OP || memory_op == memory_load); }
- bool is_store() const { return (op == STORE_OP || memory_op == memory_store); }
+ bool is_load() const { return (op == LOAD_OP ||op==TENSOR_CORE_LOAD_OP || memory_op == memory_load); }
+ bool is_store() const { return (op == STORE_OP ||op==TENSOR_CORE_STORE_OP || memory_op == memory_store); }
unsigned get_num_operands() const {return num_operands;}
unsigned get_num_regs() const {return num_regs;}
void set_num_regs(unsigned num) {num_regs=num;}
@@ -845,8 +855,10 @@ public:
address_type reconvergence_pc; // -1 => not a branch, -2 => use function return address
- unsigned out[4];
- unsigned in[4];
+ unsigned out[8];
+ unsigned outcount;
+ unsigned in[24];
+ unsigned incount;
unsigned char is_vectorin;
unsigned char is_vectorout;
int pred; // predicate register number
@@ -857,7 +869,7 @@ public:
int src[MAX_REG_OPERANDS];
} arch_reg;
//int arch_reg[MAX_REG_OPERANDS]; // register number for bank conflict evaluation
- unsigned latency; // operation latency
+ unsigned latency; // operation latency
unsigned initiation_interval;
unsigned data_size; // what is the size of the word being operated on?
@@ -946,7 +958,18 @@ public:
for(unsigned i=0; i<num_addrs; i++)
m_per_scalar_thread[n].memreqaddr[i] = addr[i];
}
-
+ void print_m_accessq(){
+
+ if(accessq_empty())
+ return;
+ else{
+ printf("Printing mem access generated\n");
+ std::list<mem_access_t>::iterator it;
+ for (it = m_accessq.begin(); it != m_accessq.end(); ++it){
+ printf("MEM_TXN_GEN:%s:%x, Size:%d \n",mem_access_type_str(it->get_type()), it->get_addr(),it->get_size());
+ }
+ }
+ }
struct transaction_info {
std::bitset<4> chunks; // bitmask: 32-byte chunks accessed
mem_access_byte_mask_t bytes;
@@ -1001,6 +1024,10 @@ public:
assert( !m_empty );
return m_warp_id;
}
+ unsigned warp_id_func() const // to be used in functional simulations only
+ {
+ return m_warp_id;
+ }
unsigned dynamic_warp_id() const
{
assert( !m_empty );