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authorTim Rogers <[email protected]>2017-05-09 13:39:46 -0400
committerGitHub <[email protected]>2017-05-09 13:39:46 -0400
commitbcd1867f8f800f2f4eda9da4e8b2b2d6a567e622 (patch)
tree81d2baa94e8f8f298aff5b44e164df43ae30a57d /src/abstract_hardware_model.h
parent54529f8b3556427526fd416118c444ce0eb10a21 (diff)
parent96d528311239d6ff82d7bec807a2509b344c9a60 (diff)
Merge branch 'dev' into dev
Diffstat (limited to 'src/abstract_hardware_model.h')
-rw-r--r--src/abstract_hardware_model.h58
1 files changed, 57 insertions, 1 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index ba4ea29..aaa4b00 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -154,15 +154,35 @@ enum _memory_op_t {
#include <stdlib.h>
#include <map>
#include <deque>
+#include <algorithm>
#if !defined(__VECTOR_TYPES_H__)
struct dim3 {
unsigned int x, y, z;
};
#endif
+struct dim3comp {
+ bool operator() (const dim3 & a, const dim3 & b) const
+ {
+ if(a.z < b.z)
+ return true;
+ else if(a.y < b.y)
+ return true;
+ else if (a.x < b.x)
+ return true;
+ else
+ return false;
+ }
+};
void increment_x_then_y_then_z( dim3 &i, const dim3 &bound);
+//Jin: child kernel information for CDP
+#include "stream_manager.h"
+class stream_manager;
+struct CUstream_st;
+extern stream_manager * g_stream_manager;
+
class kernel_info_t {
public:
// kernel_info_t()
@@ -250,6 +270,35 @@ private:
std::list<class ptx_thread_info *> m_active_threads;
class memory_space *m_param_mem;
+
+public:
+ //Jin: parent and child kernel management for CDP
+ void set_parent(kernel_info_t * parent, dim3 parent_ctaid, dim3 parent_tid);
+ void set_child(kernel_info_t * child);
+ void remove_child(kernel_info_t * child);
+ bool is_finished();
+ bool children_all_finished();
+ void notify_parent_finished();
+ CUstream_st * create_stream_cta(dim3 ctaid);
+ CUstream_st * get_default_stream_cta(dim3 ctaid);
+ bool cta_has_stream(dim3 ctaid, CUstream_st* stream);
+ void destroy_cta_streams();
+ void print_parent_info();
+ kernel_info_t * get_parent() { return m_parent_kernel; }
+
+private:
+ kernel_info_t * m_parent_kernel;
+ dim3 m_parent_ctaid;
+ dim3 m_parent_tid;
+ std::list<kernel_info_t *> m_child_kernels; //child kernel launched
+ std::map< dim3, std::list<CUstream_st *>, dim3comp > m_cta_streams; //streams created in each CTA
+
+//Jin: kernel timing
+public:
+ unsigned long long launch_cycle;
+ unsigned long long start_cycle;
+ unsigned long long end_cycle;
+ unsigned m_launch_latency;
};
struct core_config {
@@ -334,7 +383,7 @@ protected:
std::deque<simt_stack_entry> m_stack;
};
-#define GLOBAL_HEAP_START 0x80000000
+#define GLOBAL_HEAP_START 0x703E20000
// start allocating from this address (lower values used for allocating globals in .ptx file)
#define SHARED_MEM_SIZE_MAX (64*1024)
#define LOCAL_MEM_SIZE_MAX (8*1024)
@@ -825,6 +874,7 @@ public:
m_mem_accesses_created=false;
m_cache_hit=false;
m_is_printf=false;
+ m_is_cdp = 0;
}
virtual ~warp_inst_t(){
}
@@ -997,6 +1047,11 @@ protected:
std::list<mem_access_t> m_accessq;
static unsigned sm_next_uid;
+
+ //Jin: cdp support
+public:
+ int m_is_cdp;
+
};
void move_warp( warp_inst_t *&dst, warp_inst_t *&src );
@@ -1051,6 +1106,7 @@ class core_t {
warp_inst_t getExecuteWarp(unsigned warpId);
void get_pdom_stack_top_info( unsigned warpId, unsigned *pc, unsigned *rpc ) const;
kernel_info_t * get_kernel_info(){ return m_kernel;}
+ class ptx_thread_info ** get_thread_info() { return m_thread; }
unsigned get_warp_size() const { return m_warp_size; }
void and_reduction(unsigned ctaid, unsigned barid, bool value) { reduction_storage[ctaid][barid] &= value; }
void or_reduction(unsigned ctaid, unsigned barid, bool value) { reduction_storage[ctaid][barid] |= value; }