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| author | mkhairy <[email protected]> | 2019-09-23 15:29:49 -0400 |
|---|---|---|
| committer | GitHub <[email protected]> | 2019-09-23 15:29:49 -0400 |
| commit | e5264f1dbcdadfb7614797ebff013f163dd10a6a (patch) | |
| tree | 156f3b64414a0a8cf6a6619852c392ad80c77d6e /src/abstract_hardware_model.h | |
| parent | dba877b45fe11187d56904bbd169f4e0a5ad0586 (diff) | |
| parent | caea1a724ebd32a9c11e2af25e79862f84baf9d6 (diff) | |
Merge pull request #32 from mkhairy/dev
Dev
Diffstat (limited to 'src/abstract_hardware_model.h')
| -rw-r--r-- | src/abstract_hardware_model.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index dda4ead..46534ab 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -65,6 +65,8 @@ enum FuncCache { FuncCachePreferL1 = 2 }; +enum AdaptiveCache { FIXED = 0, VOLTA = 1 }; + #ifdef __cplusplus #include <stdio.h> @@ -323,7 +325,7 @@ class kernel_info_t { unsigned long long end_cycle; unsigned m_launch_latency; - mutable bool volta_cache_config_set; + mutable bool cache_config_set; }; class core_config { @@ -369,7 +371,7 @@ class core_config { unsigned gpgpu_max_insn_issue_per_warp; bool gmem_skip_L1D; // on = global memory access always skip the L1 cache - bool adaptive_volta_cache_config; + bool adaptive_cache_config; }; // bounded stack that implements simt reconvergence using pdom mechanism from |