Refactoring:

1. Moving mem_access_t to abstract_hardware_model and making set (queue) of
   accesses part of warp_inst_t. I.e., treat set of accesses as an ISA concept
   rather than a hardware organization concept.  This is only partly "done"...
 	   logic for computing accesses is still part of shader_core_ctx in this CL.
          Given number of warp_inst_t accessors for accessq, now seems like we might even 
   want to move some memory stage code into warp_inst_t class.  How those
   accesses make it to memory system is the hardware concept.
2. Making warp_inst_t an explicit arguement of subroutines used in memory stage...
   The eventual goal here is (likely) to refactor memory into a hardware block...
   i.e., have function units be a class that contains some set of pipeline stages
   internally and some set of input/output "ports".
3. Moving accessor functions is_load, is_store; is_const, is_local into class
   declaration (where they belong).
4. Removing code for selecting pipeline uarch (might add it back later, but first
   want a clean GT200 organization). In particular, removing option to have an
   operand collector -- now you MUST have the operand collector.
5. Removing more deadcode from prior changes (fixed delay queue related)

Scripts/configs:
6. Correlation script not printing out exit condition when hardware launch fails
7. Update config files to have proper compute model selected

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7834]

1 files changed, 6 insertions, 10 deletions

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 7f4eebd..5293d7d 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -873,21 +873,20 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id )
             skip = !pred_lookup(pI->get_pred_mod(), pred_value.pred & 0x000F);
       }
    }
-   if( !skip ) {
+   if( skip ) {
+      inst.set_not_active(lane_id);
+   } else {
       ptx_instruction *pJ = NULL;
       if( pI->get_opcode() == VOTE_OP ) {
          pJ = new ptx_instruction(*pI);
-         *((warp_inst_t*)pJ) = inst;
+         *((warp_inst_t*)pJ) = inst; // copy active mask information
          pI = pJ;
       }
       switch ( pI->get_opcode() ) {
 #define OP_DEF(OP,FUNC,STR,DST,CLASSIFICATION) case OP: FUNC(pI,this); op_classification = CLASSIFICATION; break;
 #include "opcodes.def"
 #undef OP_DEF
-
-         default:
-            printf( "Execution error: Invalid opcode (0x%x)\n", pI->get_opcode() );
-            break;
+      default: printf( "Execution error: Invalid opcode (0x%x)\n", pI->get_opcode() ); break;
       }
       delete pJ;
 
@@ -1024,10 +1023,7 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id )
       inst.set_addr(lane_id, insn_memaddr);
       inst.data_size = insn_data_size;
       inst.memory_op = insn_memory_op;
-   } else {
-      inst.space = undefined_space;
-      inst.memory_op = no_memory_op;
-   }
+   } 
 
    } catch ( int x  ) {
       printf("GPGPU-Sim PTX: ERROR (%d) executing intruction (%s:%u)\n", x, pI->source_file(), pI->source_line() );