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| author | tgrogers <[email protected]> | 2018-10-07 20:22:32 -0400 |
|---|---|---|
| committer | tgrogers <[email protected]> | 2018-10-07 20:22:32 -0400 |
| commit | 6bea063d90358417b9d95dd17f8c2b88491b7385 (patch) | |
| tree | 9ab5081e2b0fccfcd3e62a7f8d7bd3d8750323b7 /src/cuda-sim/opcodes.def | |
| parent | 1e2d7b4c3147a0371c26bf086024d1cf770ad60c (diff) | |
| parent | e97db22feb5aef9978feaae9f5c92507c73d7d96 (diff) | |
Merge branch 'dev-purdue-integration' of github.rcac.purdue.edu:jain156/gpgpu-sim_distribution into jain156-dev-purdue-integration
Diffstat (limited to 'src/cuda-sim/opcodes.def')
| -rw-r--r-- | src/cuda-sim/opcodes.def | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def index e1b1422..ccf64d8 100644 --- a/src/cuda-sim/opcodes.def +++ b/src/cuda-sim/opcodes.def @@ -35,7 +35,9 @@ SFU 4 Mem(except Tex) 5 Tex 6 Nop 7 +Breakpoint 9 Other 10 +Scalar video 11 */ OP_DEF(ABS_OP,abs_impl,"abs",1,1) OP_DEF(ADD_OP,add_impl,"add",1,1) |