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authorDavit Grigoryan <[email protected]>2026-04-27 06:39:20 +0000
committerDavit Grigoryan <[email protected]>2026-04-27 06:39:20 +0000
commit2e2f1c89a6b296c9cb28c8e8b0fabb670b4ba3f7 (patch)
tree9b6e18eb4e7182ed1fa0f0f46fc3c57d40c8021d /src/cuda-sim
parent2f190971f5f952f55197d385c688667439bc6649 (diff)
fix co-issue scheduling pc assertions
Diffstat (limited to 'src/cuda-sim')
-rw-r--r--src/cuda-sim/cuda-sim.cc17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 14ae504..fb72f25 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -1794,6 +1794,23 @@ void ptx_thread_info::ptx_exec_inst(warp_inst_t &inst, unsigned lane_id) {
bool skip = false;
int op_classification = 0;
addr_t pc = next_instr();
+ if (pc != inst.pc) {
+ static unsigned dump_count = 0;
+ if (dump_count < 32) {
+ dump_count++;
+ fprintf(stderr,
+ "[PC_ASSERT_DBG #%u] cycle=%llu warp_id=%u lane=%u hw_tid=%u "
+ "hw_wid=%u thread_pc=0x%lx inst_pc=0x%lx inst_op=%d "
+ "active_count=%u dbg_path=%u split_id=%d source_inst=%p\n",
+ dump_count,
+ (unsigned long long)(m_gpu->gpu_sim_cycle + m_gpu->gpu_tot_sim_cycle),
+ inst.warp_id(), lane_id, get_hw_tid(), get_hw_wid(),
+ (unsigned long)pc, (unsigned long)inst.pc, (int)inst.op,
+ inst.active_count(), inst.get_dbg_path(),
+ inst.get_dbg_split_id(), inst.get_dbg_source_inst());
+ }
+ fflush(stderr);
+ }
assert(pc ==
inst.pc); // make sure timing model and functional model are in sync
const ptx_instruction *pI = m_func_info->get_instruction(pc);